L64733C LSI Logic Corporation, L64733C Datasheet - Page 29

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L64733C

Manufacturer Part Number
L64733C
Description
Tuner And Satellite Receiver Chipset Data Sheet 2/01
Manufacturer
LSI Logic Corporation
Datasheet
Table 4
1.
2.
Parameter
Baseband Frequency
Response
LPF Cutoff Frequency
Accuracy
Quadrature Gain Error
Quadrature Phase Error
Synthesizer
Crystal Frequency Range
XTLOUT Voltage Levels
XTLOUT DC Level
MODp, MODn Delay
PLLINp, PLLINn and
MODp, MODn Hold Time
Local Oscillator
LO Tuning Range
LO Phase Noise, Including
Doubler. Subject to LC tank
implementation.
LO Buffer Frequency
Range when overdriven by
external LO
(Sheet 3 of 3)
roughly 10 * log(15/Rs[MS/s]) dB due to channel bandwidth reduction.
For symbol rates below 15 MS/s, the maximum input power might be subject to shifting down by
x 1.5 harmonic rejection for F
AC Characteristics of the L64733C (Cont.)
L64733C/L64734 Tuner and Satellite Receiver Chipset
Condition
Deviation from ideal 7th-order
Butterworth, measure to F 3 dB x 0.7.
Include front-end tilt effects
Measured 3 dB point.
Includes effects from baseband filters
Measure at 125 kHz
Measured on 10 pF in parallel with
1 M
Must assert MOD level within this time
period to ensure that the next PSOUT
period gives correct count. Delay is
with respect to rising edge of PSOUT
(previous count).
With respect to rising edge of PSOUT.
This means that PSOUT need not con-
tinue to be asserted after MOD has
given correct count.
1 kHz offset. Depends on PLL loop
gain.
10 kHz offset. Depends on PLL loop
gain.
100 kHz offset
FDOUB = low
LO
= 725 MHz.
@8 MHz
@31.4 MHz
0.75
Min
925
543
0.5
5.5
10
4
0
Typ
1.0
2.0
55
75
95
1180
2175
Max
7.26
0.5
5.5
1.2
1.5
10
4
7
dBc/Hz
dBc/Hz
dBc/Hz
Units
MHz
nsec
nsec
MHz
MHz
Deg
Vpp
dB
dB
%
%
V
29

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