STPCI01 STMicroelectronics, STPCI01 Datasheet - Page 45

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STPCI01

Manufacturer Part Number
STPCI01
Description
STPC INDUSTRIAL - PC COMPATIBLE EMBEDED MICROPROC
Manufacturer
STMicroelectronics
Datasheet

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Table 4-6. AC Memory Timing Characteristics
Table 4-7. Graphics Adapter (VGA) AC Timing
Note 1; T
Where T
T
Note 2; Value to be derived from CAS pulse width which is programmable (see
Note 3; for all chronograms, CLK refers to the clock signal that the program is using. It can be either HCLK or GCLK2X
Dataoff
tWCH
tWRH
tWCR
tWCS
tWRP
Name
tRCH
tRWL
tCWL
tDHR
tCHR
tRCS
tRAD
tRPC
tCRS
tCSH
tRAL
tRP
tAR
t18
t19
n
T
t
CAS Out
CAS
Dataoff
and t
Cycle
Cycle
is the number of CAS Cycles (see
CAS Out
is the number of clock cycles.
Parameter
is the Generic Datahold
x n
Read Command Hold Time
Read Command Setup Time
RAS Precharge Time
Write Command Hold Time
WE Command Setup Time
WE Hold Time
WE Setup Time
Column Address Hold Time from RAS
RAS to valid Column Address Delay
Column Address to RAS Setup Time
Write Command Hold Reference to RAS
Write Command to RAS Setup Time (Note 2)
Write Command to CAS Setup Time (Note 2)
Data Hold Reference to RAS
RAS High to CAS Low Precharge
CAS Before RAS Setup Time
CAS Before RAS Hold Time
CAS Hold Time after RAS
the CLK (either HCLK or GCLK2X) to CAS Low.
Parameter
DCLK to VSYNC valid
DCLK to HSYNC valid
CAS
are used to refine the timing programming.
+ (t
Data off
- t
CAS out
)
Issue 2.4 - February 11, 2002
Section
6.7.)
ELECTRICAL SPECIFICATIONS
Section
1T
1T
2T
1T
1T
Note 2
1T
1T
1T
2T
1T
1T
1T
3T
1T
1T
1T
1T
Min
Min
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
6.7.).
Max
Max
27
27
Units
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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