74AVC16244DGG,518 NXP Semiconductors, 74AVC16244DGG,518 Datasheet - Page 2

CI BUFF DVR TRI-ST 16BIT 48TSSOP

74AVC16244DGG,518

Manufacturer Part Number
74AVC16244DGG,518
Description
CI BUFF DVR TRI-ST 16BIT 48TSSOP
Manufacturer
NXP Semiconductors
Series
74AVCr
Datasheet

Specifications of 74AVC16244DGG,518

Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
4
Number Of Bits Per Element
4
Current - Output High, Low
12mA, 12mA
Voltage - Supply
1.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-TSSOP
Logic Family
AVC
Number Of Channels Per Chip
16
Polarity
Non-Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.2 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
High Level Output Current
- 12 mA
Low Level Output Current
12 mA
Minimum Operating Temperature
- 40 C
Output Type
3-State
Propagation Delay Time
2.6 ns (Typ) at 1.2 V, 1.8 ns (Typ) at 1.5 V, 1.7 ns (Typ) at 1.8 V, 1.3 ns (Typ) at 2.5 V, 1.1 ns (Typ) at 3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74AVC16244DG-T
74AVC16244DG-T
935264443518
Philips Semiconductors
FEATURES
1999 Nov 15
handbook, halfpage
Wide supply voltage range from 1.2 to 3.6 V
Complies with JEDEC standard no. 8-1A/5/7
CMOS low power consumption
Input/output tolerant up to 3.6 V
Dynamic Controlled Output (DCO) circuit dynamically
changes output impedance, resulting in noise reduction
without speed degradation
Low inductance multiple power and ground pins for
minimum noise and ground bounce
Power off disables 74AVC16244 outputs, permitting live
insertion.
16-bit buffer/line driver; 3-state
(3.6 V tolerant)
Fig.1 Output current as a function of output voltage.
(mA)
I OH
100
200
300
0
0
2.5 V
3.3 V
1.8 V
1
2
3
V OH (V)
MNA506
4
2
DESCRIPTION
The 74AVC16244 is a 16-bit non-inverting buffer/line
driver with 3-state outputs. This device can be used as four
4-bit buffers, two 8-bit buffers or one 16-bit buffer.
The 3-state outputs are controlled by the output enable
inputs nOE. A HIGH level on input nOE causes the outputs
to assume a high-impedance OFF-state.
This product is designed to have an extremely fast
propagation delay and a minimum amount of power
consumption.
To ensure the high-impedance output state during
power-up or power-down, input nOE should be tied to V
through a pull-up resistor (live insertion).
A DCO circuitry is implemented to support termination line
drive during transient (see Figs 1 and 2).
handbook, halfpage
Fig.2 Output current as a function of output voltage.
(mA)
I OL
300
200
100
0
0
1.8 V
1
2.5 V
3.3 V
2
Product specification
74AVC16244
3
V OL (V)
MNA507
4
CC

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