74HC365N,652 NXP Semiconductors, 74HC365N,652 Datasheet - Page 14

• Manufacturer Part Number: 74HC365N,652
• Description: IC BUFF DVR TRI-ST HEX 16PDIP
• Manufacturer: NXP Semiconductors
• Series: 74HCr

Specifications of 74HC365N,652

• Package / Case: 16-DIP (0.300", 7.62mm)
• Logic Type: Buffer/Line Driver, Non-Inverting
• Number Of Elements: 1
• Number Of Bits Per Element: 6
• Current - Output High, Low: 7.8mA, 7.8mA
• Voltage - Supply: 2 V ~ 6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Through Hole
• Logic Family: HC
• Number Of Channels Per Chip: 6
• Polarity: Non-Inverting
• Supply Voltage (max): 6 V
• Supply Voltage (min): 2 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• High Level Output Current: - 7.8 mA
• Input Bias Current (max): 8 uA
• Low Level Output Current: 7.8 mA
• Minimum Operating Temperature: - 40 C
• Output Type: 3-State
• Propagation Delay Time: 95 ns @ 2 V or 19 ns @ 4.5 V or 16 ns @ 6 V
• Number Of Lines (input / Output): 6 / 6
• Logical Function: Buffer/Line Driver
• Number Of Elements: 1
• Number Of Channels: 6
• Number Of Inputs: 6
• Number Of Outputs: 6
• Operating Supply Voltage (typ): 5V
• Package Type: PDIP
• Operating Supply Voltage (max): 6V
• Operating Supply Voltage (min): 2V
• Quiescent Current: 8uA
• Technology: CMOS
• Pin Count: 16
• Mounting: Through Hole
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-1435-5; 74HC365N; 933669580652

Philips Semiconductors
AC waveforms 74HCT (continued)
Test circuit for 74HCT
March 1988
handbook, full pagewidth
handbook, full pagewidth
HCMOS family characteristics
Switch position
Note
1. For open-drain N-channel outputs t
TEST
t
t
t
t
C
R
PZH
PZL
PHZ
PLZ
L
T
=
=
load capacitance including jig and probe capacitance
(see AC CHARACTERISTICS for values).
termination resistance should be equal to the output impedance Z
the pulse generator.
SWITCH
GND
V
GND
V
CC
CC
LOW-to-OFF
OFF-to-LOW
HIGH-to-OFF
OFF-to-HIGH
MGK566
OUTPUT
OUTPUT
OUTPUT
ENABLE
GENERATOR
PULSE
Fig.11 Propagation delays of 3-state outputs.
90%
Fig.12 Test circuit for 3-state outputs.
PLZ
t f
1.3 V
10%
and t
V I
t PLZ
enabled
outputs
t PHZ
PZL
R T
are applicable.
10%
D.U.T
V CC
90%
14
o
of
disabled
outputs
V O
C L
t r
t PZL
t PZH
R L = 1 k
50 pF
FAMILY SPECIFICATIONS
1.3 V
MGK563
1.3 V
outputs
enabled
V CC