TMP92xy29FG Toshiba, TMP92xy29FG Datasheet - Page 40
TMP92xy29FG
Manufacturer Part Number
TMP92xy29FG
Description
Manufacturer
Toshiba
Datasheet
1.TMP92XY29FG.pdf
(764 pages)
Specifications of TMP92xy29FG
Package
QFP176
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
98
Power Supply Voltage(v)
3.0 to 3.6
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(4) Runaway prevention using SFR protection register
from runaway caused by stopping of the clock or by changes to the memory control
register (Memory controller, MMU) which prevent fetch operations.
by setting up a double key to EMCCR1 and EMCCR2 registers.
executed with protection in the ON state.
(Purpose)
Prevention of program runaway caused by introduction of noise.
Write operations to a specified SFR are prohibited so that the program is protected
Runaway error handling is also facilitated by INTP0 interruption.
Specified SFR list
(Operation explanation)
Execute and release of protection (write operation to specified SFR) becomes possible
Protection state can be confirmed by reading EMCCR0<PROTECT>.
At reset, protection becomes OFF.
INTP0 interruption also occurs when a write operation to the specified SFR is
(Double key)
1
2
st
nd
1. Memory controller
2. MMU
3. Clock gear
4. PLL
5. PMC
-KEY: writes in sequence, 5AH at EMCCR1 and A5H at EMCCR2
-KEY: writes in sequence, A5H at EMCCR1 and 5AH at EMCCR2
B0CSL/H, B1CSL/H, B2CSL/H, B3CSL/H, BECSL/H
MSAR0, MSAR1, MSAR2, MSAR3,
MAMR0, MAMR1, MAMR2, MAMR3, PMEMCR,
MEMCR0, CSTMGCR, WRTMGCR, RDTMGCR0
RDTMGCR1, BROMCR
LOCALPX/PY/PZ, LOCALLX/LY/LZ,
LOCALRX/RY/RZ, LOCALWX/WY/WZ,
LOCALESX/ESY/ESZ, LOCALEDX/EDY/EDZ,
LOCALOSX/OSY/OSZ, LOCALODX/ODY/ODZ
SYSCR0, SYSCR1, SYSCR2, EMCCR0
PLLCR0,PLLCR1
PMCCTL
92CF29A-38
TMP92CF29A
2009-06-11
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