TMP92xy29FG Toshiba, TMP92xy29FG Datasheet - Page 375

• Manufacturer Part Number: TMP92xy29FG
• Manufacturer: Toshiba

Specifications of TMP92xy29FG

• Package: QFP176
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 98
• Power Supply Voltage(v): 3.0 to 3.6

SCL line
Internal SCL
output
SDA line
<LRB>
<BB>
<PIN>
Note: X: Don’t care
Note: Don’t write <MST> = “0”, when <MST> = “0” condition. (Cannot be restarted)
(5) Restart
change the data transfer direction.
Master Mode.
the bus. The SDA line remains High and the SCL pin is released. Since a stop
condition has not been generated on the bus, other devices assume the bus to be in
busy state.
SBISR<BB> = “0” or signal level “1” of SCL pin in port mode. Check the <LRB> until it
becomes 1 to check that the SCL line on a bus is not pulled down to the low-level by
other devices. After confirming that the bus remains in a free state, generate a start
condition using the procedure described in (2).
In order to satisfy the set-up time requirements when restarting, take at least 4.7 μs of
waiting time by software from the time of restarting to confirm that the bus is free
until the time to generate the start condition.
SBICR2 ← 0 0 0 1 1 0 0 0
if SBISR<BB> ≠ 0
Then
if SBISR<LRB> ≠ 1
Then
4.7 μ s Wait
SBICR1 ← X X X 1 X X X X
SBIDBR ← X X X X X X X X
SBICR2 ← 1 1 1 1 1 0 0 0
Restart is used during data transfer between a master device and a slave device to
The following description explains how to restart when the TMP92CF29A is in
Clear SBICR2<MST, TRX, and BB> to “0” and set SBICR2<PIN> to “1” to release
And confirm SCL pin, that SCL pin is released and become bus-free state by
Figure 3.16.20 Timing chart for generate restart
7 6 5 4 3 2 1 0
“0” → <MST>
“0” → <TRX>
“0” → <BB>
“1” → <PIN>
92CF29A-373
Release the bus
Check if SCL pin is released.
Check if SCL pin of other device is “L” level.
Set acknowledgement mode.
Set the slave address and direction bit.
Generate start condition.
“1” → <MST>
“1” → <TRX>
“1” → <BB>
“1” → <PIN>
4.7 μ s (Min)
Start condition
TMP92CF29A
2009-06-11