MAX9152 Maxim, MAX9152 Datasheet
MAX9152
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MAX9152 Summary of contents
Page 1
... Rev 0; 4/01 800Mbps LVDS/LVPECL-to-LVDS General Description The MAX9152 crosspoint switch is designed for applications requiring high speed, low power, and low- noise signal distribution. This device includes two LVDS/LVPECL inputs, two LVDS outputs, and two logic inputs that set the internal connections between differ- ential inputs and outputs ...
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... TSSOP (derate 9.4mW/°C above +70°C) .........755mW Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability ...
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LVDS/LVPECL-to-LVDS ELECTRICAL CHARACTERISTICS (continued +3.0V to +3.6V, NC/RSEL = open for input voltage ( IN+ IN +3.3V, ...
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LVDS/LVPECL-to-LVDS Crosspoint Switch AC ELECTRICAL CHARACTERISTICS (continued +3.0V to +3.6V, NC/RSEL = open for 0.15V EN_ = high, SEL0 = low, SEL1 = high, differential input ...
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LVDS/LVPECL-to-LVDS +3.3V 100Ω, NC/RSEL = high pattern +1.2V +25°C, unless otherwise noted PEAK-TO-PEAK OUTPUT JITTER vs. DATA RATE ...
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... EMI emissions and system susceptibility to noise. The MAX9152 is an 800Mbps crosspoint switch designed for high-speed, low-power point-to-point and multidrop interfaces. The device accepts LVDS or dif- ferential LVPECL signals and routes them to outputs depending on the selected mode of operation ...
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... ID IN_+ IN_- Figure 3. Input to Falling Edge Select Setup, Hold, and Mux Switch Timing Diagram The differential inputs of the MAX9152 do not have internal fail-safe biasing. If fail-safe biasing is required, it can be implemented with external large-value resis- tors. IN_+ should be pulled IN_ should be pulled down to GND with 10kΩ. The volt- age-divider formed by the 10kΩ ...
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... Devices can be cascaded to make larger switches. 3V Total propagation delay and total jitter should be con- 1.5V sidered to determine the maximum allowable switch 0 size. Three MAX9152s are needed to make a 2 input x t PZH 4 output crosspoint switch with two device propagation VOH 50% delays. Seven MAX9152s make a 2 input x 8 output 1 ...
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... CC Differential Traces Trace characteristics affect the performance of the MAX9152. Use controlled-impedance traces. Eliminate reflections and ensure that noise couples as common mode by running the differential trace pairs close together. Reduce skew by matching the electrical length of the traces. Excessive skew can result in a degradation of magnetic field cancellation ...
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... IN_- 33Ω 33Ω Figure 9. PECL to LVDS Level Conversion Network Pin Configuration TOP VIEW SEL1 1 SEL0 2 INO+ 3 MAX9152 INO- 4 VCC 5 IN1+ 6 IN1- 7 NC/RSEL 8 SO/TSSOP 10 ______________________________________________________________________________________ TRANSISTOR COUNT: 880 PROCESS: CMOS 3.3V 1/2 MAX9152 16 EN0 15 EN1 14 OUT0+ 13 OUT0- 12 GND 11 OUT1+ 10 OUT1 Chip Information ...
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LVDS/LVPECL-to-LVDS ______________________________________________________________________________________ Crosspoint Switch Package Information 11 ...
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... LVDS/LVPECL-to-LVDS Crosspoint Switch Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © ...