73S8023C Maxim, 73S8023C Datasheet - Page 15

• Manufacturer Part Number: 73S8023C
• Description: The 73S8023C is a single smart card interface IC, compliant to the electrical requirements of ISO 7816-3, EMV 4
• Manufacturer: Maxim

DS_8023C_019
10 I/O Circuitry and Timing
The I/O, AUX1, and AUX2 pins are in the low state after power-on reset and they are in the high state
when the activation sequencer turns on the I/O reception state. See
Deactivation
The state of the I/OUC, AUX1UC, and AUX2UC pins is high after power-on reset. Within a card session
and when the I/O reception state is on, the first I/O line on which a falling edge is detected becomes the
input I/O line and the other becomes the output I/O line. When the input I/O line rising edge is detected,
both I/O lines return to their neutral state.
Figure 9
The delay between the I/O signals is shown in
Rev. 1.5
CMDVCC
PRES
VCC
OFF
In order to be compliant to the NDS specifications, a 27 pF capacitor must be added between pins
I/O (C7) and GND (C5) at the smart card connector.
shows the state diagram of how the I/O and I/OUC lines are managed to become input or output.
for more details on when the I/O reception is on.
outside card session
Figure 8: Timing Diagram – Management of the Interrupt Line OFF
Figure
within card session
10.
card extracted
OFF is low by
Section 8 Activation and
73S8023C Data Sheet
within card
session
OFF is low by
any fault
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