STR910FAZ32 STMicroelectronics, STR910FAZ32 Datasheet - Page 70
STR910FAZ32
Manufacturer Part Number
STR910FAZ32
Description
32-bit MCU
Manufacturer
STMicroelectronics
Datasheet
1.STR911FAW47.pdf
(102 pages)
Specifications of STR910FAZ32
Arm966e-s Risc Core
Harvard architecture, 5-stage pipeline, Tightly-Coupled Memories (SRAM and Flash)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STR910FAZ32H6
Manufacturer:
STMicroelectronics
Quantity:
10 000
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Electrical characteristics
7.8
7.8.1
Table 23.
1. Guaranteed by characterization, not tested in production.
7.8.2
Note:
Table 24.
1.
70/102
Bank erase
Sector erase
Bank program
Sector program
Word program
Symbol
V
V
DD
DR
= 1.8 V, V
Memory characteristics
SRAM characteristics
SRAM and hardware registers
Flash memory characteristics
V
Flash read access for sequential addresses is 0 wait states at 96 MHz. Flash read access
for non-sequential accesses requires 2 wait states when FMI clock is above 66 MHz. See
STR91xF Flash Programming Manual for more information.
Flash memory program/erase characteristics (Flash size
Supply voltage for data retention
DDQ
DDQ
= 3.3 V
Primary bank (512 Kbytes)
Primary bank (256 Kbytes)
Secondary bank (32 Kbytes)
Of primary bank (64 Kbytes)
Of secondary bank (8 Kbytes)
Primary bank (512 Kbytes)
Primary bank (256 Kbytes)
Secondary bank (32 Kbytes)
Of primary bank (64 Kbytes)
Of secondary bank (8 Kbytes)
Parameter
= 2.7 - 3.6 V, V
,
T
A
Parameter
= 25 °C.
DD
= 1.65 - 2 V, T
(1)
Doc ID 13495 Rev 6
Half word (16 bits)
T
Test conditions
A
= 85 °C (worst case)
A
= -40 / 85 °C unless otherwise specified.
Conditions
Typ
1300
3700
1900
700
300
250
500
60
8
4
8
(1)
Min
1.1
≤
Typ after 100K
512 KB)
W/E cycles
Value
1400
4700
2000
520
750
320
260
4.5
62
Typ
9
9
(1)
STR91xFAxxx
Max
1800
5100
2550
Max
11.5
950
450
320
640
80
11
6
Unit
Unit
V
ms
ms
ms
ms
ms
ms
ms
ms
µs
s
s
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