STM8L101K3 STMicroelectronics, STM8L101K3 Datasheet - Page 64

• Manufacturer Part Number: STM8L101K3
• Description: Ultra Low Power MCUs, STM8L
• Manufacturer: STMicroelectronics

Specifications of STM8L101K3

• Low Power Consumption (halt: 0.3 μA, Active-halt
• Temp. Range: -40 to 85 °C and 125 °C
• Three Low Power Modes: Wait, Active-halt, Halt

Electrical parameters
9.4
64/81
Static latch-up
●
Table 37.
Thermal characteristics
The maximum chip junction temperature (T
Table 16: General operating conditions on page
The maximum chip-junction temperature, T
using the following equation:
T
Where:
●
●
●
●
●
Jmax
LU: 2 complementary static tests are required on 10 parts to assess the latch-up
performance. A supply overvoltage (applied to each power supply pin) and a current
injection (applied to each input, output and configurable I/O pin) are performed on each
sample. This test conforms to the EIA/JESD 78 IC latch-up standard. For more details,
refer to the application note AN1181.
T
P
P
internal power.
P
where:
P
taking into account the actual V
the application.
Amax
JA
= T
Dmax
INTmax
I/Omax
I/Omax
Symbol
is the package junction-to-ambient thermal resistance in C/W
LU
Amax
is the maximum ambient temperature in C
is the sum of P
=
represents the maximum power dissipation on output pins
Electrical sensitivities
is the product of I
+ (P
(V
OL
Dmax
*I
Static latch-up class
OL
x
) + ((V
INTmax
JA
)
Doc ID 15275 Rev 11
DD
DD
and P
and V
-V
OL
Parameter
OH)
/I
I/Omax
DD
OL and
*I
, expressed in watts. This is the maximum chip
OH
Jmax
Jmax
),
(P
V
) must never exceed the values given in
, in degrees Celsius, may be calculated
OH
40.
Dmax
/I
OH
= P
of the I/Os at low and high level in
INTmax
+ P
I/Omax
)
Class
II
STM8L101xx