STV8206 STMicroelectronics, STV8206 Datasheet - Page 38

• Manufacturer Part Number: STV8206
• Description: IC TV AUDIO PROC/DEMOD 80-TQFP
• Manufacturer: STMicroelectronics
• Type: Audio Processorr

Specifications of STV8206

• Applications: Radio
• Mounting Type: Surface Mount
• Package / Case: 80-TQFP, 80-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register List
38/97
Address (hex): 03h
Type: R/W
SOFT_LRESTART1
SOFT_LRESTART2
BUS_EXPAND[1:0]
SCLPD_OFF
AUTO_OFF
SYSCK-EN
Bit Name
Bit Name
SOFTRST
Bit 7
MCK_EN
Bits[4:3]
SDI_EN
I2S_EN
0
Bit 7
Bit 2
Bit7
CTRL
Description
Provides all hardware controls to drive external components (SAW Filter, Audio Switches) and
additional Audio Decoder (Dolby Pro Logic) via register
Bit 6
BUS_EXPAND[1:0]
Reset
Reset
00
00
0
0
0
0
0
0
0
0
0
0
0
Reserved.
SCL Pulling-down System Disable
0: System is enabled
1: System is disabled
Automatic Standard Recognition System Disable
0: System is enabled
1: System is disabled
Reserved.
Softreset (active high) of Channel 1 detectors only.
Softreset (active high) of Channel 2 detectors only.
General softreset (active high) to reset all hardware registers except for I²C data.
Reserved.
Static control by I²C of hardware pins BUS1 and BUS0.
When 1, the I²S hardware pin is enabled (SCK, WS, SDO)
When 1, the SDI input pin is enabled (switch with ST output). Must be used when I²S mode is
selected.
Reserved.
Master Clock Enable
Enables the master clock output (256.fs) to interface by I²S with the Dolby Pro Logic Decoder.
0: Disabled.
1: Enabled
System Clock Enable
Enables the system clock output to provide the quartz clock required to interface with the Dolby Pro
Logic Decoder.
0: Disabled.
1: Enabled
Bit 5
Hardware Interface Control Register
I2S_EN
Bit 4
SDI_EN
Bit 3
Function
Function
I2S
including the Master and Quartz Clocks.
Bit 2
0
MCK_EN
Bit 1
SYSCK_EN
STV82x6
Bit 0