ADM1069 Analog Devices, ADM1069 Datasheet - Page 28

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ADM1069

Manufacturer Part Number
ADM1069
Description
Compact Multi- Voltage Sequencer and Supervisor with Margining Control
Manufacturer
Analog Devices
Datasheet

Specifications of ADM1069

# Supplies Monitored
8
Volt Monitoring Accuracy
1%
# Output Drivers
8
Fet Drive/enable Output
Both
Voltage Readback
12-bit ADC
Supply Adj/margining
12-bit ADC+4 DACs
Package
32 ld LQFP,40 ld LFCSP

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ADM1069
SMBus PROTOCOLS FOR RAM AND EEPROM
The ADM1069 contains volatile registers (RAM) and nonvola-
tile registers (EEPROM). User RAM occupies Address 0x00 to
Address 0xDF; the EEPROM occupies Address 0xF800 to
Address 0xFBFF.
Data can be written to and read from both the RAM and the
EEPROM as single data bytes. Data can be written only to
unprogrammed EEPROM locations. To write new data to a
programmed location, the location contents must first be erased.
EEPROM erasure cannot be done at the byte level. The EEPROM
is arranged as 32 pages of 32 bytes each, and an entire page must
be erased.
Page erasure is enabled by setting Bit 2 in the UPDCFG register
(Address 0x90) to 1. If this bit is not set, page erasure cannot
occur, even if the command byte (0xFE) is programmed across
the SMBus.
WRITE OPERATIONS
The SMBus specification defines several protocols for different
types of read and write operations. The following abbreviations
are used in Figure 39 to Figure 47:
The ADM1069 uses the following SMBus write protocols.
Send Byte
In a send byte operation, the master device sends a single
command byte to a slave device, as follows:
1.
2.
3.
4.
5.
6.
S = Start
P = Stop
R = Read
W = Write
A = Acknowledge
A = No acknowledge
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address followed by the
write bit (low).
The addressed slave device asserts an acknowledge (ACK)
on SDA.
The master sends a command code.
The slave asserts ACK on SDA.
The master asserts a stop condition on SDA and the
transaction ends.
Rev. C | Page 28 of 32
In the ADM1069, the send byte protocol is used for the following
two purposes:
To write a register address to the RAM for a subsequent
single byte read from the same address, or for a block read
or a block write starting at that address, as shown in Figure 39.
To erase a page of EEPROM memory. EEPROM memory
can be written to only if it is unprogrammed. Before writing
to one or more EEPROM memory locations that are already
programmed, the page(s) containing those locations must
first be erased. EEPROM memory is erased by writing a
command byte.
The master sends a command code telling the slave device to
erase the page. The ADM1069 command code for a page
erasure is 0xFE (1111 1110). Note that, for a page erasure
to take place, the page address must be given in the previous
write word transaction (see the Write Byte/Word section).
In addition, Bit 2 in the UPDCFG register (Address 0x90)
must be set to 1.
As soon as the ADM1069 receives the command byte,
page erasure begins. The master device can send a stop
command as soon as it sends the command byte. Page
erasure takes approximately 20 ms. If the ADM1069 is
accessed before erasure is complete, it responds with a
no acknowledge (NACK).
Figure 39. Setting a RAM Address for Subsequent Read
S
S
1
1
ADDRESS
ADDRESS
SLAVE
SLAVE
2
2
Figure 40. EEPROM Page Erasure
W
W
A
A
3
3
(0x00 TO 0xDF)
COMMAND
ADDRESS
(0xFE)
BYTE
RAM
4
4
A
A
5
5
6
P
6
P

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