ADM1069 Analog Devices, ADM1069 Datasheet
ADM1069
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ADM1069 Summary of contents
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... The ADM1069 Super Sequencer® configurable supervisory/ sequencing device that offers a single-chip solution for supply monitoring and sequencing in multiple supply systems. In addition to these functions, the ADM1069 integrates a 12-bit ADC and four 8-bit voltage output DACs. These circuits can be used to implement a closed-loop margining system that enables supply adjustment by altering either the feedback node or reference of a dc-to-dc converter using the DAC outputs ...
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... Added 40-Lead LFCSP.......................................................Universal Changes to Table 1............................................................................ 4 Moved Absolute Maximum Ratings Section, Changes to Table 3... 7 Added Figure 4, Renumbered Sequentially; Changes to Table 4..... 8 Changes to Powering the ADM1069 Section ............................. 13 Changes to Default Output Configuration Section ................... 16 Changes to Sequence Detector Section ....................................... 18 Changes to Figure 32...................................................................... 21 Changes to Configuration Download at Power-Up Section..... 24 Changes to Table 11 ...
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... This design enables very flexible sequencing of the outputs, based on the condition of the inputs. The ADM1069 is controlled via configuration data that can be programmed into an EEPROM. The entire configuration can be programmed using an intuitive GUI-based software package provided by Analog Devices, Inc ...
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... ADM1069 SPECIFICATIONS 3 14.4 V, VPx = 3 6.0 V, Table 1. Parameter POWER SUPPLY ARBITRATION VH, VPx VPx VH VDDCAP C VDDCAP POWER SUPPLY Supply Current VPx Additional Currents All PDO FET Drivers On Current Available from VDDCAP DAC Supply Currents ADC Supply Current EEPROM Erase Current SUPPLY FAULT DETECTORS ...
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... Per 100 mV step with 50 pF load V No load mV Sourcing current −100 μA DACxMAX mV Sinking current +100 μA DACxMAX μF Capacitor required for decoupling, stability dB DC kΩ μ μA OH μ < V < ADM1069 ...
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... ADM1069 Parameter Standard (Digital Output) Mode (PDO1 to PDO8 SINK R PULL- (VPx) SOURCE Three-State Output Leakage Current Oscillator Frequency DIGITAL INPUTS (VXx, A0, A1) Input High Voltage Input Low Voltage Input High Current Input Low Current, I ...
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... Table 3. Thermal Resistance −0 +6.5 V Package Type −0 32-Lead LQFP 5 V 40-Lead LFCSP 6 ESD CAUTION 7 V −0 +0.3 V ±5 mA ±20 mA 150°C −65°C to +150°C 215°C 2000 V Rev Page ADM1069 θ Unit JA 54 °C/W 25 °C/W ...
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... SMBus Data Pin. Bidirectional open drain requires external resistive pull-up. Rev Page PIN 1 30 PDO1 INDICATOR VX1 2 29 PDO2 VX2 3 28 PDO3 27 PDO4 VX3 4 ADM1069 VX4 5 26 PDO5 TOP VIEW PDO6 7 24 PDO7 VP1 (Not to Scale) VP2 8 23 PDO8 22 ...
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... In a typical application, all ground pins are connected together. Description Device Supply Voltage. Linearly regulated from the highest of the VPx, VH pins to a typical of 4.75 V. Note that a capacitor must be connected between this pin and GND μF capacitor is recom- mended for this purpose. Supply Ground. Rev Page ADM1069 ...
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... ADM1069 TYPICAL PERFORMANCE CHARACTERISTICS (V) VP1 Figure 5. V vs. V VDDCAP (V) VH Figure 6. V vs. V VDDCAP 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0 (V) VP1 Figure 7. I vs. V (VP1 as Supply) VP1 VP1 VP1 ...
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... LOAD 12000 10000 8000 6000 4000 2000 Figure 16. ADC Noise, Midcode Input, 10,000 Reads LOAD Rev Page ADM1069 1000 2000 3000 4000 CODE Figure 14. DNL for ADC 1000 2000 3000 4000 CODE Figure 15. INL for ADC 9894 25 81 ...
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... ADM1069 1 CH1 200mV M1.00µs CH1 756mV Figure 17. Transient Response of DAC Code Change into Typical Load 1 CH1 200mV M1.00µs CH1 Figure 18. Transient Response of DAC to Turn-On from High-Z State DAC 20kΩ BUFFER PROBE OUTPUT POINT 47pF DAC 100kΩ BUFFER 1V OUTPUT PROBE ...
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... A supply comparator chooses the highest input to provide the on-chip supply. There is minimal switching loss with this architecture (~0.2 V), resulting in the ability to power the ADM1069 from a supply as low as 3.0 V. Note that the supply on the VXx pins cannot be used to power the device. An external capacitor to GND is required to decouple the on- chip supply from noise ...
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... Table 6 shows the details of each input. PROGRAMMING THE SUPPLY FAULT DETECTORS The ADM1069 can have up to eight SFDs on its eight input channels. These highly programmable reset generators enable the supervision eight supply voltages. The supplies can be as low as 0 ...
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... Thus, potentially any supply can be divided down into the input range of the VXx pin and supervised. This enables the ADM1069 to monitor other supplies, such as +24 V, +48 V, and − additional supply supervision function is available when the VXx pins are selected as digital inputs ...
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... All of the internal registers in an unprogrammed ADM1069 device from the factory are set to 0. Because of this, the PDOx pins are pulled to GND by a weak (20 kΩ) on-chip pull-down resistor. As the input supply to the ADM1069 ramps up on VPx or VH, all PDOx pins behave as follows: • ...
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... If VP2 is not okay State DIS3V3. PWRGD If VX1 is high State DIS2V5. MONITOR FAULT The ADM1069 offers state definitions. The signals monitored to indicate the status of the input pins are the outputs of the SFDs. WARNINGS The SE also monitors warnings. These warnings can be generated when the ADC readings violate their limit register value or when the secondary voltage monitors on VPx and VH are triggered ...
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... ADM1069 SEQUENCING ENGINE APPLICATION EXAMPLE The application in this section demonstrates the operation of the SE. Figure 28 shows how the simple building block of a single SE state can be used to build a power-up sequence for a three-supply system. Table 8 lists the PDO outputs for each state in the same SE implementation. In this system, a good 5 V supply on VP1 and the VX1 pin held low are the triggers required to start a power-up sequence ...
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... Timeout delays of 100 μs to 400 ms can be programmed. FAULT AND STATUS REPORTING The ADM1069 has a fault latch for recording faults. Two registers, FSTAT1 and FSTAT2, are set aside for this purpose. A single bit is assigned to each input of the device, and a fault on that input sets the relevant bit ...
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... The maximum setting for the REFIN pin is 2.048 V. SUPPLY SUPERVISION WITH THE ADC In addition to the readback capability, another level of supervision is provided by the on-chip 12-bit ADC. The ADM1069 has limit DIGITIZED VOLTAGE registers with which the user can program a maximum or mini- READING mum allowable threshold ...
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... This can help to decouple any noise picked up from the board. Decoupling to a ground local to the dc-to-dc converter is recommended. The ADM1069 can be commanded to margin a supply up or down over the SMBus by updating the values on the relevant DAC output. VIN ...
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... PCB GND TRACE NOISE DECOUPLING CAPACITOR Figure 33. Closed-Loop Margining System Using the ADM1069 the current flowing through R3. Therefore, a direct relationship exists between the extra voltage drop across R1 during margining and the voltage drop across R3. This relationship is given by the following equation: ΔV where: Δ ...
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... PDO6 SYSTEM RESET PDO7 VX4 PDO8 3.3V OUT REFOUT DAC1 REFIN VCCP VDDCAP GND 10µF 10µF 10µF EN DC-TO-DC4 Figure 34. Applications Diagram Rev Page 12V OUT 5V OUT 3V OUT IN DC-TO-DC1 EN OUT 3.3V OUT IN DC-TO-DC2 EN OUT 1.25V OUT IN DC-TO-DC3 EN OUT 1.2V OUT IN 0.9V OUT OUT TRIM ADM1069 ...
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... EEPROM contents to the RAM again, as described in Option 3, restoring the ADM1069 to its original configuration. The topology of the ADM1069 makes this type of operation possible ...
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... EEPROM. Therefore, access to the ADM1069 is restricted until the download is complete. Identifying the ADM1069 on the SMBus The ADM1069 has a 7-bit serial bus slave address (see Table 11). The device is powered up with a default serial bus address. The five MSBs of the address are set to 10011; the two LSBs are determined by the logical states of Pin A1 and Pin A0 ...
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... ADM1069 The device also has several identification registers (read-only) that can be read across the SMBus. Table 12 lists these registers with their values and functions. Table 12. Identification Register Values and Functions Name Address Value Function MANID 0xF4 0x41 Manufacturer ID for Analog Devices ...
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... SLAVE FRAME 2 DATA BYTE ACK. BY MASTER FRAME N DATA BYTE HD; STA SU; STA t SU; DAT S Figure 38. Serial Bus Timing Diagram Rev Page ADM1069 9 D0 ACK. BY MASTER STOP NO ACK. BY MASTER t SU; STO P ...
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... The slave asserts ACK on SDA. 6. The master asserts a stop condition on SDA and the transaction ends. In the ADM1069, the send byte protocol is used for the following two purposes: • To write a register address to the RAM for a subsequent single byte read from the same address, or for a block read or a block write starting at that address, as shown in Figure 39 ...
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... In a block write operation, the master device writes a block of data to a slave device. The start address for a block write must have been set previously. In the ADM1069, a send byte opera- tion sets a RAM address, and a write byte/word operation sets an EEPROM address, as follows: 1 ...
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... ADM1069 is correct. The PEC byte is an optional byte sent after the last data byte has been written to or read from the ADM1069. The protocol is the same as a block read for Step 1 to Step 12 and then proceeds as follows: 13 ...
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... ORDERING GUIDE Model 1 Temperature Range ADM1069ASTZ −40°C to +85°C ADM1069ASTZ-REEL −40°C to +85°C ADM1069ASTZ-REEL7 −40°C to +85°C ADM1069ACPZ −40°C to +85°C ADM1069ACPZ-REEL −40°C to +85°C ADM1069ACPZ-REEL7 −40°C to +85°C EVAL-ADM1069LQEBZ RoHS Compliant Part. 0.75 1.60 MAX 0.60 0. 0.20 0.09 7° ...
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... ADM1069 NOTES ©2005–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04735-0-6/11(C) Rev Page ...