AD5426 Analog Devices, AD5426 Datasheet - Page 18

• Manufacturer Part Number: AD5426
• Description: High Bandwidth CMOS 8-Bit Serial Interface Multiplying D/A Converter
• Manufacturer: Analog Devices

Specifications of AD5426

• Resolution (bits): 8bit
• Dac Update Rate: 2.47MSPS
• Dac Settling Time: 50ns
• Max Pos Supply (v): +5.5V
• Single-supply: Yes
• Dac Type: Current Out
• Dac Input Format: Ser,SPI

AD5426/AD5432/AD5443
ADDING GAIN
In applications where the output voltage is required to be
greater than V
amplifier or it can be achieved in a single stage. It is important
to consider the effect of temperature coefficients of the thin film
resistors of the DAC. Simply placing a resistor in series with the
R
resulting in larger gain temperature coefficient errors. Instead,
the circuit shown in Figure 46 is a recommended method of
increasing the gain of the circuit. R1, R2, and R3 should all have
similar temperature coefficients, but they need not match the
temperature coefficients of the DAC. This approach is
recommended in circuits where gains of greater than 1 are
required.
DACS USED AS A DIVIDER OR PROGRAMMABLE
GAIN ELEMENT
Current-steering DACs are very flexible and lend themselves to
many different applications. If this type of DAC is connected as
the feedback element of an op amp and R
resistor as shown in Figure 47, then the output voltage is
inversely proportional to the digital input fraction, D.
For D = 1 − 2
As D is reduced, the output voltage increases. For small values
of D, it is important to ensure that the amplifier does not
saturate and also that the required accuracy is met. For example,
an 8-bit DAC driven with the binary code 0x10 (00010000), that
is, 16 decimal, in the circuit of Figure 47 should cause the
output voltage to be 16 × V
linearity specification of ±0.5 LSB, then D can in fact have the
weight anywhere in the range 15.5/256 to 16.5/256 so that
the possible output voltage will be in the range 15.5 V
16.5 V
maximum error of 0.2%.
V
FB
IN
resistor causes mismatches in the temperature coefficients,
NOTES
1. ADDITIONAL PINS OMITTED FOR CLARITY.
2. C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE REQUIRED
V
IF A1 IS A HIGH SPEED AMPLIFIER.
OUT
R1
IN
—an error of +3% even though the DAC itself has a
= −V
Figure 46. Increasing Gain of Current Output DAC
V
REF
−n
IN
IN
the output voltage is
, gain can be added with an additional external
/ D = −V
GND
V
V
DD
DD
IN
R
/(1 − 2
IN
FB
. However, if the DAC has a
I
I
OUT
OUT
1
2
−N
)
C1
FB
A1
is used as the input
R3
R2
GAIN = R2 + R3
R1 = R2R3
R2 + R3
IN
V
OUT
to
R2
Rev. C | Page 18 of 28
DAC leakage current is also a potential error source in divider
circuits. The leakage current must be counterbalanced by an
opposite current supplied from the op amp through the DAC. Since
only a fraction D of the current into the V
the I
where R is the DAC resistance at the V
leakage current of 10 nA, R = 10 kΩ,  a nd a gain (that is, 1/D) of 16,
the error voltage is 1.6 mV.
REFERENCE SELECTION
When selecting a reference for use with the AD5426 series of
current output DACs, pay attention to the references output
voltage temperature coefficient specification. This parameter not
only affects the full-scale error, but can also affect the linearity (INL
and DNL) performance. The reference temperature coefficient
should be consistent with the system accuracy specifications. For
example, an 8-bit system required to hold its overall specification to
within 1 LSB over the temperature range 0°C to 50°C dictates
that the maximum system drift with temperature should be less
than 78 ppm/°C. A 12-bit system with the same temperature
range to overall specification within 2 LSBs requires a maximum
drift of 10 ppm/°C. By choosing a precision reference with low
output temperature coefficient this error source can be minimized.
Table 7 suggests some references available from Analog Devices
that are suitable for use with this range of current output DACs.
AMPLIFIER SELECTION
The primary requirement for the current-steering mode is an
amplifier with low input bias currents and low input offset
voltage. The input offset voltage of an op amp is multiplied by
the variable gain (due to the code-dependent output resistance
of the DAC) of the circuit. A change in this noise gain between
two adjacent digital fractions produces a step change in the
output voltage due to the amplifier’s input offset voltage. This
output voltage change is superimposed on the desired change in
output between the two codes and gives rise to a differential
linearity error, which, if large enough, could cause the DAC to
be nonmonotonic. In general, the input offset voltage should be
a fraction (~ <1/4) of an LSB to ensure monotonic behavior
when stepping through codes.
Figure 47. Current Steering DAC as a Divider or Programmable Gain Element
Output error voltage due to DAC leakage = (leakage × R )/ D
OUT
1 terminal, the output voltage has to change as follows:
V
ADDITIONAL PINS OMITTED FOR CLARITY.
IN
I
I
OUT
OUT
1
2
R
FB
GND
V
V
DD
DD
V
REF
REF
REF
terminal. For a DAC
terminal is routed to
V
OUT