AD5426 Analog Devices, AD5426 Datasheet - Page 17

• Manufacturer Part Number: AD5426
• Description: High Bandwidth CMOS 8-Bit Serial Interface Multiplying D/A Converter
• Manufacturer: Analog Devices

Specifications of AD5426

• Resolution (bits): 8bit
• Dac Update Rate: 2.47MSPS
• Dac Settling Time: 50ns
• Max Pos Supply (v): +5.5V
• Single-supply: Yes
• Dac Type: Current Out
• Dac Input Format: Ser,SPI

SINGLE-SUPPLY APPLICATIONS
Current Mode Operation
These DACs are specified and tested to guarantee operation
in single-supply applications. In the current mode circuit of
Figure 43, I
applied to V
In this configuration, the output voltage is given by
As D varies from 0 to 255 (AD5426), 1023 (AD5432) or 4095
(AD5443), the output voltage varies from
V
sourcing all possible variations in current at the I
without any problems.
It is important to note that V
the switches in the DAC ladder no longer have the same source
drain drive voltage. As a result, their on resistance differs, which
degrades the linearity of the DAC. See Figure 15 to Figure 20.
Voltage Switching Mode of Operation
Figure 44 shows these DACs operating in the voltage switching
mode. The reference voltage, V
I
at the V
voltage results in a positive output voltage, making single-
supply operation possible. The output from the DAC is voltage
at a constant impedance (the DAC ladder resistance), thus an
op amp is necessary to buffer the output voltage. The reference
input no longer sees a constant input impedance, but one that
varies with code. Therefore, the voltage input should be driven
from a low impedance source.
OUT
BIAS
V
2 is connected to AGND, and the output voltage is available
IN
V
V
should be a low impedance source capable of sinking and
NOTES
1. ADDITIONAL PINS OMITTED FOR CLARITY.
2. C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE
OUT
OUT
REF
REQUIRED IF A1 IS A HIGH SPEED AMPLIFIER.
= { D × ( R
= V
terminal. In this configuration, a positive reference
OUT
Figure 43. Single-Supply Current Mode Operation
V
BIAS
REF
BIAS
2 and hence I
.
to V
GND
V
V
FB
DD
DD
/ R
OUT
V
DAC
BIAS
= 2 V
) × ( V
R
FB
OUT
IN
I
I
OUT
OUT
BIAS
1 is biased positive by an amount
is limited to low voltages because
IN
A2
BIAS
1
2
, is applied to the I
− V
− V
IN
C1
IN
)} + V
A1
A1
BIAS
OUT
OUT
2 terminal
V
OUT
1 pin,
Rev. C | Page 17 of 28
It is important to note that V
the switches in the DAC ladder no longer have the same source
drain drive voltage. As a result, their on resistance differs, which
degrades the linearity of the DAC.
Also, V
internal diode turns on, exceeding the maximum ratings of the
device. In this type of application, the full range of multiplying
capability of the DAC is lost.
POSITIVE OUTPUT VOLTAGE
Note that the output voltage polarity is opposite to the V
polarity for dc reference voltages. To achieve a positive voltage
output, an applied negative reference to the input of the DAC
is preferred over the output inversion through an inverting
amplifier because of the resistor’s tolerance errors. To generate
a negative reference, the reference can be level shifted by an
op amp such that the V
become the virtual ground and −2.5 V, respectively, as shown
in Figure 45.
NOTES
1. ADDITIONAL PINS OMITTED FOR CLARITY.
2. C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE REQUIRED IF A1 IS
V
A HIGH SPEED AMPLIFIER.
IN
Figure 45. Positive Voltage Output with Minimum of Components
NOTES
1. ADDITIONAL PINS OMITTED FOR CLARITY.
2. C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE REQUIRED
+5V
–5V
IF A1 IS A HIGH SPEED AMPLIFIER.
Figure 44. Single-Supply Voltage Switching Mode Operation
IN
V
ADR03
OUT
must not go negative by more than 0.3 V or an
–2.5V
GND
I
OUT
V
1
IN
V
REF
R
FB
V
DD
GND
V
OUT
GND
DD
V
V
= 5V
DD
DD
AD5426/AD5432/AD5443
and GND pins of the reference
IN
R
V
is limited to low voltages because
FB
REF
I
I
OUT
OUT
1
2
R1
C1
R2
A1
A1
V
TO +2.5V
V
OUT
OUT
REF
= 0V