AD7940 Analog Devices, AD7940 Datasheet - Page 12

• Manufacturer Part Number: AD7940
• Description: 3 mW, 100 kSPS, 14-Bit ADC in 6-Lead SOT-23
• Manufacturer: Analog Devices

Specifications of AD7940

• Resolution (bits): 14bit
• # Chan: 1
• Sample Rate: 100kSPS
• Interface: Ser,SPI
• Analog Input Type: SE-Uni
• Ain Range: Uni Vdd
• Adc Architecture: SAR
• Pkg Type: SOP,SOT

ADC TRANSFER FUNCTION
The output coding of the AD7940 is straight binary. The
designed code transitions occur at successive integer LSB
values, i.e., 1 LSB, 2 LSBs. The LSB size is V
transfer characteristic for the AD7940 is shown in Figure 14.
TYPICAL CONNECTION DIAGRAM
Figure 15 shows a typical connection diagram for the AD7940.
V
decoupled. This provides an analog input range of 0 V to V
The conversion result is output in a 16-bit word. This 16-bit
data stream consists of two leading zeros, followed by the 14
bits of conversion data, MSB first. For applications where power
consumption is a concern, the power-down mode should be
used between conversions or bursts of several conversions to
improve power performance (see the Modes of Operation
section).
REF
111...111
111...110
111...000
011...111
000...010
000...001
000...000
is taken internally from V
0V
Figure 14. AD7940 Transfer Characteristic
1 LSB
ANALOG INPUT
DD
1 LSB = V
and as such should be well
DD
/16384
+V
DD
DD
/16384. The ideal
–1 LSB
DD
Rev. A | Page 12 of 20
.
In fact, because the supply current required by the AD7940 is so
low, a precision reference can be used as the supply source to
the AD7940. For example, a REF19x voltage reference (REF195
for 5 V or REF193 for 3 V) or an AD780 can be used to supply
the required voltage to the ADC (see Figure 15). This
configuration is especially useful if the power supply available is
quite noisy, or if the system supply voltages are at some value
other than the required operating voltage of the AD7940, e.g.,
15 V. The REF19x or AD780 will output a steady voltage to the
AD7940. Recommended decoupling capacitors are a 100 nF low
ESR ceramic (Farnell 335-1816) and a 10 µF low ESR tantalum
(Farnell 197-130).
0V TO V
Digital Inputs
The digital inputs applied to the AD7940 are not limited by the
maximum ratings that limit the analog inputs. Instead, the
digital inputs applied can go to 7 V and are not restricted by the
V
AD7940 were operated with a V
be used on the digital inputs. However, it is important to note
that the data output on SDATA will still have 3 V logic levels
when V
Another advantage of SCLK and CS not being restricted by the
V
are avoided. If one of these digital inputs is applied before V
there is no risk of latch-up as there would be on the analog
inputs if a signal greater than 0.3 V were applied prior to V
DD
DD
INPUT
+ 0.3 V limit as on the analog inputs. For example, if the
+ 0.3 V limit is the fact that power supply sequencing issues
DD
DD
= 3 V.
V
GND
IN
V
DD
TANT
10µF
Figure 15. Typical Connection Diagram
AD7940
0.1µF
3V
INTERFACE
SDATA
SCLK
SERIAL
CS
DD
REF193
of 3 V, 5 V logic levels could
10µF
0.1µF
µC/µP
AD7940
5V
SUPPLY
DD
DD
.
,