AD7938-6 Analog Devices, AD7938-6 Datasheet - Page 26

• Manufacturer Part Number: AD7938-6
• Description: 8-Channel, 625 kSPS, 12-Bit Parallel ADCs with a Sequencer
• Manufacturer: Analog Devices

Specifications of AD7938-6

• Resolution (bits): 12bit
• # Chan: 8
• Sample Rate: 625kSPS
• Interface: Par
• Analog Input Type: Diff-Uni,SE-Uni
• Ain Range: Uni (Vref),Uni (Vref) x 2
• Adc Architecture: SAR
• Pkg Type: CSP,QFP

AD7938-6
POWER MODES OF OPERATION
The AD7938-6 has four different power modes of operation.
These modes are designed to provide flexible power
management options. Different options can be chosen to
optimize the power dissipation/throughput rate ratio for
differing applications. The mode of operation is selected by the
power management bits, PM1 and PM0, in the control register,
as detailed in Table 8. When power is first applied to the
AD7938-6 an on-chip, power-on reset circuit ensures that the
default power-up condition is normal mode.
Note that, after power-on, the track-and-hold is in hold mode
and the first rising edge of CONVST places the track-and-hold
into track mode.
Normal Mode (PM1 = PM0 = 0)
This mode is intended for the fastest throughput rate
performance. The user does not have to worry about any
power-up times associated with the AD7938-6 because it
remains fully powered up at all times. At power-on reset, this
mode is the default setting in the control register.
Autoshutdown (PM1 = 0; PM0 = 1)
In this mode of operation, the AD7938-6 automatically enters
full shutdown at the end of each conversion, which is shown at
Point A in Figure 35 and Figure 39. In shutdown mode, all
internal circuitry on the device is powered down. The part
retains information in the control register during shutdown.
The track-and-hold also goes into hold at this point and
remains in hold as long as the device is in shutdown. The
AD7938-6 remains in shutdown mode until the next rising
edge of CONVST (see Point B in
order to keep the device in shutdown for as long as possible,
CONVST should idle low between conversions, as shown in
Figure 39
the track-and-hold returns to track mode. The power-up time
required is 10 ms minimum regardless of whether the user is
operating with the internal or external reference. The user
should ensure that the power-up time has elapsed before
initiating a conversion.
. On this rising edge, the part begins to power-up and
CONVST
CLKIN
BUSY
Figure 35
1
and
Figure 39
A
Figure 39. Autoshutdown/Autostandby Mode
14
). In
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Autostandby (PM1 = 1; PM0 = 0)
In this mode of operation, the AD7938-6 automatically enters
standby mode at the end of each conversion, which is shown as
Point A in Figure 35. When this mode is entered, all circuitry
on the AD7938-6 is powered down except for the reference and
reference buffer. The track-and-hold goes into hold at this point
also and remains in hold as long as the device is in standby. The
part remains in standby until the next rising edge of CONVST
powers up the device. The power-up time required depends on
whether the internal or external reference is used. With an
external reference, the power-up time required is a minimum of
600 ns, while when using the internal reference, the power-up
time required is a minimum of 7 μs. The user should ensure this
power-up time has elapsed before initiating another conversion
as shown in
the track-and-hold back into track mode.
Full Shutdown Mode (PM1 =1; PM0 = 1)
When this mode is programmed, all circuitry on the AD7938-6
is powered down upon completion of the write operation, that
is, on the rising edge of WR . The track-and-hold enters hold
mode at this point. The part retains the information in the
control register while the part is in shutdown. The AD7938-6
remains in full shutdown mode, with the track-and-hold in
hold mode, until the power management bits (PM1 and PM0)
in the control register are changed. If a write to the control
register occurs while the part is in full shutdown mode, and the
power management bits are changed to PM0 = PM1 = 0, that is,
normal mode, the part begins to power-up on the WR rising
edge and the track-and-hold returns to track. To ensure the part
is fully powered up before a conversion is initiated, the power-
up time of 10 ms minimum should be allowed before the next
CONVST falling edge; otherwise, invalid data is read.
Note that all power-up times quoted apply with a 470 nF
capacitor on the V
B
Figure 39
t
POWER-UP
REFIN
. This rising edge of
pin.
1
14
CONVST also places
Data Sheet