AD7634 Analog Devices, AD7634 Datasheet
AD7634
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AD7634 Summary of contents
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... Analog Devices, Inc. ’ s iCMOS high voltage process. The device is configured through hardware or via a dedicated write-only serial configuration port for input range and operating mode. The AD7634 contains a high speed 18-bit sampling ADC, an internal conversion clock, an internal reference (and buffer), error correction circuits, and both serial and parallel system interface ports ...
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... AD7634 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Timing Specifications .................................................................. 5 Absolute Maximum Ratings............................................................ 7 ESD Caution.................................................................................. 7 Pin Configuration and Function Descriptions............................. 8 Typical Performance Characteristics ........................................... 12 Terminology .................................................................................... 16 Theory of Operation ...................................................................... 17 Overview...................................................................................... 17 Converter Operation.................................................................. 17 Modes of Operation ................................................................... 17 Transfer Functions...................................................................... 18 Typical Connection Diagram ................................................... 19 Analog Inputs ...
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... kHz kHz kHz Full-scale step Rev Page AD7634 unless otherwise noted. MIN MAX Min Typ Max 18 −V +V REF REF − REF REF − ...
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... AD7634 Parameter INTERNAL REFERENCE Output Voltage Temperature Drift Line Regulation Long-Term Drift Turn-On Settling Time REFERENCE BUFFER REFBUFIN Input Voltage Range EXTERNAL REFERENCE Voltage Range Current Drain TEMPERATURE PIN Voltage Output Temperature Sensitivity Output Resistance DIGITAL INPUTS Logic Levels ...
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... Rev Page AD7634 unless otherwise noted. MIN MAX Typ Max Unit ns μ 1.18/1.43/1.68 μ 1.18/1.43/1.68 μ 1.15/1.40/1.65 μ ...
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... AD7634 Parameter SLAVE SERIAL/SERIAL CONFIGURATION INTERFACE MODES (See Figure 44, Figure 45, and Figure 47) External SDCLK, SCCLK Setup Time External SDCLK Active Edge to SDOUT Delay SDIN/SCIN Setup Time SDIN/SCIN Hold Time External SDCLK/SCCLK Period External SDCLK/SCCLK High External SDCLK/SCCLK Low 1 In warp mode only, the time between conversions is 1 ms; otherwise, there is no required maximum time. ...
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... Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION = 91°C/ 26°C/W. JA Rev Page AD7634 ...
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... Conversion Mode Selection. See the WARP pin description in this table. See the Modes of Operation section for a more detailed description AGND 1 PIN 1 AVDD 2 MODE0 3 MODE1 4 D0/OB/2C 5 AD7634 WARP 6 TOP VIEW IMPULSE 7 (Not to Scale) D1/A0 8 D2/ Figure 4 ...
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... When MODE[1: Serial Data Clock Source Select. In serial mode, this input is used to select EXT/INT the internally generated (master) or external (slave) serial data clock for the AD7634 output data. When EXT/INT = low (master mode), the internal serial data clock is selected on SDCLK output. ...
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... RESET DI Reset Input. When high, reset the AD7634. Current conversion, if any, is aborted. The falling edge of RESET resets the data outputs to all zeros (with OB/2C = high) and clears the configuration register. See the 2 ...
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... In all ranges, IN+ must be driven 180° out of phase with IN− 45 TEMP AO Temperature Sensor Analog Output. When the internal reference is enabled (PDREF = PDBUF = low), this pin outputs a voltage proportional to the temperature of the AD7634. See the Voltage Reference Input/Output section. 46 REFBUFIN AI Reference Buffer Input. When using an external reference with the internal reference buffer (PDBUF = low, PDREF = high), applying 2 ...
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... AD7634 TYPICAL PERFORMANCE CHARACTERISTICS AVDD = DVDD = 5 V; OVDD = 5 V; VCC = 15 V; VEE = − 2.5 POSITIVE INL = 1.40LSB NEGATIVE INL = –1.10LSB 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 –2.5 0 65536 131072 CODE Figure 5. Integral Nonlinearity vs. Code, Bipolar 10 V Range 120 100 –2.0 – ...
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... TO 5V –50 –40 –30 –20 –10 INPUT LEVEL (dB) SFDR SECOND THD HARMONIC THIRD 10 100 FREQUENCY (kHz 10V ±10V ±5V –35 – TEMPERATURE (°C) Figure 16. SINAD vs. Temperature AD7634 SNR SINAD 0 140 120 100 1000 105 125 ...
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... AD7634 –100 –104 –108 ±5V –112 ±10V –116 –120 0V TO 10V –124 –128 –55 –35 – TEMPERATURE (°C) Figure 17. THD vs. Temperature 20 16 ZERO/OFFSET ERROR –4 –8 NEGATIVE FULL-SCALE ERROR –12 –16 –20 –55 –35 – TEMPERATURE (°C) Figure 18. Zero/Offset Error, Positive and Negative Full-Scale Error vs. Temperature, All Normalized to 25° ...
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... TEMPERATURE (°C) Figure 23. Power-Down Operating Currents vs. Temperature 105 Figure 24. Typical Delay vs. Load Capacitance C Rev Page AD7634 OVDD = 2.7V @ 85°C OVDD = 2.7V @ 25°C OVDD = 5V @ 85°C OVDD = 5V @ 25°C 50 100 150 200 C (pF ...
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... CNVST input to when the input signal is held for a conversion. Transient Response The time required for the AD7634 to achieve its rated accuracy after a full-scale step function is applied to its input. Reference Voltage Temperature Coefficient Reference voltage temperature coefficient is derived from the typical shift of output voltage at 25° ...
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... The AD7634 is a very fast, low power, precise, 18-bit ADC using successive approximation capacitive digital-to-analog (CDAC) architecture. The AD7634 can be configured at any time for one of four input ranges and conversion mode with inputs in parallel and serial hardware modes dedicated write-only, SPI-compatible interface via a configuration register in serial software mode. The AD7634 uses Analog Devices’ ...
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... ADC performs a background calibration during the SAR conversion process. This calibration can drift if the time between conversions exceeds 1 ms thus causing the first conversion to appear offset. This mode makes the AD7634 ideal for applications where both high accuracy and fast sample rate are required. Normal Mode ...
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... TYPICAL CONNECTION DIAGRAM Figure 27 shows a typical connection diagram for the AD7634 using the internal reference, serial data interface, and serial configuration port. Different circuitry from that shown in Figure 27 is optional and is discussed in the following sections. ANALOG SUPPLY (5V) 10µF 100nF +7V TO +15.75V ...
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... Note that D3 and D4 are only used in the range to allow for additional protection in applications that are switching from the higher voltage ranges. This analog input structure of the AD7634 is a true differential structure allowing the sampling of the differential signal between IN+ and IN−. By using this differential input, small signals common to both inputs are rejected as shown in Figure 29, which represents the typical CMRR over frequency ...
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... DRIVER AMPLIFIER CHOICE Although the AD7634 is easy to drive, the driver amplifier must meet the following requirements: • For multichannel, multiplexed applications, the driver ampli- fier and the AD7634 analog input circuit must be able to settle for a full-scale step of the capacitor array at a 18-bit level (0 ...
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... The 100 nF capacitors should be placed as close as possible to the AD7634. To reduce the number of supplies needed, the DVDD can be supplied through a simple RC filter from the analog supply, as shown in Figure 27. ...
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... PD input is a don’t care and should be tied to either high or low. CONVERSION CONTROL The AD7634 is controlled by the CNVST input. A falling edge on CNVST is all that is necessary to initiate a conversion. A detailed timing diagram of the conversion process is shown in Figure 35 by the power-down input, PD, until the conversion is complete ...
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... RD is generally used to enable the conversion result on the data bus. RESET The RESET input is used to reset the AD7634. A rising edge on RESET aborts the current conversion (if any) and tristates the data bus. The falling edge of RESET resets the AD7634 and clears the data bus and configuration register ...
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... MODE[1:0]= 3. The AD7634 has a serial interface (SPI-compatible) multiplexed on the data pins D[17:4]. Data Interface The AD7634 outputs 18 bits of data, MSB first, on the SDOUT pin. This data is synchronized with the 18 clock pulses provided on the SDCLK pin. The output data is valid on both the rising and falling edge of the data clock ...
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... AD7634 CS, RD CNVST BUSY t 17 SYNC SDCLK t 18 SDOUT Figure 41. Master Serial Data Timing for Reading (Read Previous Conversion During Convert) CS CNVST BUSY t 29 SYNC t 14 SDCLK t 15 SDOUT t 16 RDC/SDIN = 1 INVSCLK = INVSYNC = 0 MODE[1: EXT/INT = 0 ...
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... EXT/ INT , INVSCLK, SDIN, SDOUT, SDCLK, and RDERROR. External Clock (MODE[1: EXT/ INT = High) Setting the EXT/ INT = high allows the AD7634 to accept an externally supplied serial data clock on the SDCLK pin. In this mode, several methods can be used to read the data. The external serial clock is gated by CS ...
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... AD7634 External Clock Data Read After/During Conversion It is also possible to begin to read data after conversion and continue to read the last bits after a new conversion is initiated. This method allows the full throughput and the use of a slower SDCLK frequency. Again recommended to use a ...
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... SOFTWARE CONFIGURATION The pins multiplexed on D[17:14] used for software configura- tion are: HW SCIN, SCCLK, and SCCS . The AD7634 is programmed using the dedicated write-only serial configurable port (SCP) for conversion mode, input range selection, output coding, and power-down using the serial configuration register. ...
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... ADSP-219x. Figure 48 shows an interface diagram between the AD7634 and the SPI-equipped ADSP-219x. To accom- modate the slower speed of the DSP, the AD7634 acts as a slave device, and data must be read after conversion. This mode also allows the daisy-chain feature. The convert command could be initiated in response to an internal timer interrupt ...
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... Digital and analog ground planes should be joined in only one place, preferably underneath the AD7634 close as possible to the AD7634. If the AD7634 system where multiple devices require analog-to-digital ground connect- ions, the connections should still be made at one point only, a star ground point, established as close as possible to the AD7634 ...
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... Model Notes Temperature Range AD7634BCPZ −40°C to +85°C AD7634BCPZRL −40°C to +85°C AD7634BSTZ −40°C to +85°C AD7634BSTZRL −40°C to +85°C 2 EVAL-AD7634CBZ 3 EVAL-CONTROL BRD3 RoHS Compliant Part. 2 This board can be used as a standalone evaluation board or in conjunction with the EVAL-CONTROL BRD3 for evaluation/demonstration purposes. ...