SAM9261 Atmel Corporation, SAM9261 Datasheet - Page 210

• Manufacturer Part Number: SAM9261
• Manufacturer: Atmel Corporation

Specifications of SAM9261

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Ssc: 3
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 160
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

AC Parameters
9.1
9-2
Timing diagrams
The timing diagrams in this section are:
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Instruction memory interface timing parameters are shown in Figure 9-1.
Figure 9-1 Instruction memory interface timing
Figure 9-2 Data memory interface timing on page 9-3
Figure 9-3 Clock enable timing on page 9-3
Figure 9-4 Coprocessor interface timing on page 9-4
Figure 9-5 Exception and configuration timing on page 9-4
Figure 9-6 Debug interface timing on page 9-5
Figure 9-7 Interrupt sensitivity status timing on page 9-5
Figure 9-8 JTAG interface timing on page 9-6
Figure 9-9 DBGSDOUT to DBGTDO relationship on page 9-7.
Copyright © 2000 ARM Limited. All rights reserved.
CLK
InMREQ,
ISEQ
IA[31:1]
InTRANS
InM[4:0]
ITBIT
INSTR[31:0]
IABORT
DBGIEBKPT
Figure 9-1 Instruction memory interface timing
T ovitrans
T oviaddr
T ovictl
Address
TRANS
Control
T isiabort
T isiebkpt
T isinstr
T ohitrans
T ohiaddr
T ohictl
ARM DDI 0165B
T ihinstr
T ihiabort
T ihiebkpt