SAM9261 Atmel Corporation, SAM9261 Datasheet - Page 179

• Manufacturer Part Number: SAM9261
• Manufacturer: Atmel Corporation

Specifications of SAM9261

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Ssc: 3
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 160
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

ARM DDI 0165B
Table 8-15 shows the cycle timing for
instructions with and without interlocks.
Table 8-16 shows the cycle timing for
interlocks.
Cycle
Normal
Interlock
Cycle
Normal
Interlock
Copyright © 2000 ARM Limited. All rights reserved.
1
1
2
1
2
1
2
3
Table 8-15 SMULxy, SMLAxy, SMULWy, and SMLAWy cycle timing
IA
pc+3i
b
pc+3i
pc+3i
IA
pc+3i
pc+3i
pc+3i
pc+3i
pc+3i
InMREQ,
ISEQ
S cycle
b
I cycle
S cycle
InMREQ,
ISEQ
I cycle
S cycle
I cycle
I cycle
S cycle
SMULxy
SMLALxy
INSTR
(pc+2i)
(pc+3i)
(pc+2i)
-
(pc+3i)
INSTR
(pc+2i)
-
(pc+3i)
(pc+2i)
-
-
(pc+3i)
,
SMLAxy
instructions with and without
Table 8-16 SMLALxy cycle timing
DA
-
-
-
DA
-
-
-
-
-
,
SMULWy
DnMREQ,
DSEQ
I cycle
b
I cycle
I cycle
DnMREQ,
DSEQ
I cycle
I cycle
I cycle
I cycle
I cycle
, and
Instruction Cycle Times
SMLAWy
RDATA/
WDATA
-
-
-
RDATA/
WDATA
-
-
-
8-19