SAM7X128 Atmel Corporation, SAM7X128 Datasheet - Page 198

• Manufacturer Part Number: SAM7X128
• Manufacturer: Atmel Corporation

Specifications of SAM7X128

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 55 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 62
• Ext Interrupts: 62
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 2
• Twi (i2c): 1
• Uart: 3
• Can: 1
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.3
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

AC and DC Parameters
7.22
7-26
Address latch enable control
Figure 7-22 shows the ARM7TDMI reset period timing. The timing parameters used in
Figure 7-22 are listed in Table 7-21.
In Figure 7-22, T
address in phase 2. If ALE is driven LOW after T
is known as address breakthrough.
Note
Copyright © 1994-2001. All rights reserved.
MAS[1:0]
nTRANS
ald
A[31:0]
MCLK
LOCK
nOPC
is the time by which ALE must be driven LOW to latch the current
nRW
ALE
Symbol
T
T
T
ald
ale
aleh
Table 7-21 ALE address control timing parameters
Parameter
Address group latch output time
Address group latch open output delay
Address group latch output hold time
Phase 1
T
ale
ald
, then a new address is latched. This
T
aleh
Figure 7-22 ALE control timing
T
ald
Phase 2
ARM DDI 0029G
Maximum
Maximum
Minimum
Parameter
type