SAM3N4A Atmel Corporation, SAM3N4A Datasheet - Page 665

• Manufacturer Part Number: SAM3N4A
• Manufacturer: Atmel Corporation

Specifications of SAM3N4A

• Flash (kbytes): 256 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 48 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 79
• Ext Interrupts: 79
• Quadrature Decoder Channels: 2
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 2
• Uart: 3
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 24
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

33.7.5
Name:
Address:
Access:
This register can only be written if the WPEN bit is cleared in
• CHx: Channel x Enable
0 = No effect.
1 = Enables the corresponding channel.
Note: if USEQ = 1 in ADC_MR register, CHx corresponds to the xth channel of the sequence described in ADC_SEQR1
and ADC_SEQR2.
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
CH15
CH7
31
23
15
–
–
7
ADC Channel Enable Register
CH14
CH6
30
22
14
ADC_CHER
0x40038010
Write-only
–
–
6
CH13
CH5
29
21
13
–
–
5
CH12
CH4
28
20
12
–
–
4
“ADC Write Protect Mode Register” on page
CH11
CH3
27
19
11
–
–
3
CH10
CH2
26
18
10
–
–
2
CH9
CH1
25
17
–
–
9
1
677.
SAM3N
SAM3N
CH8
CH0
24
16
–
–
8
0
665
665