ATxmega192A3 Atmel Corporation, ATxmega192A3 Datasheet - Page 201
ATxmega192A3
Manufacturer Part Number
ATxmega192A3
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega192A3
Flash (kbytes)
192 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
50
Ext Interrupts
50
Usb Speed
No
Usb Interface
No
Spi
10
Twi (i2c)
2
Uart
7
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
16
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
7
Output Compare Channels
22
Input Capture Channels
22
Pwm Channels
22
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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Manufacturer
Quantity
Price
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1 200
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Manufacturer:
TI/NSC
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Part Number:
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Manufacturer:
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124
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18.3.6
18.3.7
18.3.8
18.3.9
8077H–AVR–12/09
CNT2 - Counter Register 2
CNT1 - Counter Register 1
CNT0 - Counter Register 0
PER3 - Period Register 3
PER3, PER2, PER1 and PER0 registers represent the 32-bit value PER. PER is constantly
compared with the counter value (CNT). A compare match will set the OVFIF in the INTFLAGS
register, and CNT will be set to zero in the next RTC clock cycle.
The PER register can only be written if the RTC is disabled and not currently synchronizing, i.e
when both ENABLE and SYNCBUSY are zero.
After writing a byte in the PER register the condition for setting OVFIF and the Overflow Wakeup
condition is disabled for the following two RTC clock cycles.
After reset this register is 0x0000, and it must be set to a value different that zero before the
enabled RTC starts counting.
Bit
+0x06
Read/Write
Reset Value
Bit
+0x05
Read/Write
Reset Value
Bit
+0x04
Read/Write
Reset Value
Bit
+0x0B
Read/Write
Reset Value
R/W
R/W
R/W
R/W
7
7
7
7
0
0
0
0
R/W
R/W
R/W
R/W
6
6
6
6
0
0
0
0
R/W
R/W
R/W
R/W
5
5
5
5
0
0
0
0
R/W
R/W
R/W
R/W
4
4
4
4
0
0
0
0
CNT[23:16]
PER[31:24]
CNT[15:8]
CNT[7:0]
R/W
R/W
R/W
R/W
3
3
3
3
0
0
0
0
R/W
R/W
R/W
R/W
2
2
2
2
0
0
0
0
R/W
R/W
R/W
R/W
1
1
1
1
0
0
0
0
XMEGA A
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
CNT2
CNT1
CNT0
PER3
201
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