ATmega649A Atmel Corporation, ATmega649A Datasheet - Page 57

• Manufacturer Part Number: ATmega649A
• Manufacturer: Atmel Corporation

Specifications of ATmega649A

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 54
• Ext Interrupts: 17
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Segment Lcd: 100
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

8284D–AVR–6/11
ATmega169A/PA/329A/PA/3290A/PA/649A/P/6490A/P
Table 12-2
BOOTRST and IVSEL settings. If the program never enables an interrupt source, the Interrupt
Vectors are not used, and regular program code can be placed at these locations. This is also
the case if the Reset Vector is in the Application section while the Interrupt Vectors are in the
Boot section or vice versa.
Table 12-2.
Note:
The most typical and general program setup for the Reset and Interrupt Vector Addresses in
ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P is:
BOOTRST
Address
0x0000
0x0002
0x0004
0x0006
0x0008
0x000A
0x000C
0x000E
0x0010
0x0012
0x0014
0x0016
0X0018
0x001A
0x001C
0x001E
0x0020
0x0022
0x0024
0x0026
0x0028
0x002A
0x002C
0x002E
0x0030
;
0x0032
0x0033
0x0034
0x0035
1
1
0
0
2. When the IVSEL bit in MCUCR is set, Interrupt Vectors will be moved to the start of the Boot Flash Sec-
3. PCINT2 and PCINT3 are only present in ATmega3290A/3290PA/6490A/6490P
1.
The Boot Reset Address is shown in
tion. The address of each Interrupt Vector will then be the address in this table added to the start address
of the Boot Flash Section.
grammed while “0” means programmed.
shows reset and Interrupt Vectors placement for the various combinations of
Reset and Interrupt Vectors Placement
Labels
RESET:
IVSEL
0
1
0
1
Code
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
ldi
out
ldi
out
Reset Address
0x0000
0x0000
Boot Reset Address
Boot Reset Address
RESET
EXT_INT0
PCINT0
PCINT1
TIM2_COMP
TIM2_OVF
TIM1_CAPT
TIM1_COMPA
TIM1_COMPB
TIM1_OVF
TIM0_COMP
TIM0_OVF
SPI_STC
USART_RXC
USART_UDRE
USART_TXC
USI_STRT
USI_OVF
ANA_COMP
ADC
EE_RDY
SPM_RDY
LCD_SOF
PCINT2
PCINT3
r16, high(RAMEND)
SPH,r16
r16, low(RAMEND)
SPL,r16
Table 27-9 on page
(1)
Interrupt Vectors Start Address
0x0002
Boot Reset Address + 0x0002
0x0002
Boot Reset Address + 0x0002
306. For the BOOTRST Fuse “1” means unpro-
Comments
; Reset Handler
; IRQ0 Handler
; PCINT0 Handler
; PCINT1 Handler
; Timer2 Compare Handler
; Timer2 Overflow Handler
; Timer1 Capture Handler
; Timer1 CompareA Handler
; Timer1 CompareB Handler
; Timer1 Overflow Handler
; Timer0 Compare Handler
; Timer0 Overflow Handler
; SPI Transfer Complete Handler
; USART0 RX Complete Handler
; USART0,UDR0 Empty Handler
; USART0 TX Complete Handler
; USI Start Condition Handler
; USI Overflow Handler
; Analog Comparator Handler
; ADC Conversion Complete Handler
; EEPROM Ready Handler
; SPM Ready Handler
; LCD Start of Frame Handler
; PCINT2 Handler
; PCINT3 Handler
; Main program start
; Set Stack Pointer to top of RAM
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