AT83EB5114 Atmel Corporation, AT83EB5114 Datasheet - Page 72

• Manufacturer Part Number: AT83EB5114
• Manufacturer: Atmel Corporation

Specifications of AT83EB5114

• Max. Operating Frequency: 24 MHz
• Cpu: 8051-12C
• Max I/o Pins: 11
• Adc Channels: 6
• Adc Resolution (bits): 10
• Adc Speed (ksps): 50
• Sram (kbytes): 0.25
• Eeprom (bytes): 256
• Operating Voltage (vcc): 3.0 to 3.6
• Timers: 4
• Mask Rom (kbytes): 4
• Watchdog: Yes

Flash Memory
FM0 Memory
Architecture
User Space
Extra Row (XRow)
Hardware security Byte
Column latches
Overview of Flash Memory
Operations
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AT89/83EB5114
As shown Figure 32, the Flash version of AT8xEB5114 implements 4 Kbytes of on-chip
program/code memory.
The Flash memory increases EPROM and ROM functionality by in-circuit electrical era-
sure and programming. Thanks to the internal charge pump, the high voltage needed for
programming or erasing Flash cells is generated on-chip using the standard VDD
voltage.
Hardware programming mode is available using specific programming tool.
AT8xEB5114 features a Flash memory containing 4 Kbytes of program memory (user
space) organized into 128 byte pages,
This Flash memory is programmable by parallel programming.
Figure 32. Flash Memory Architecture
The Flash memory is made up of 4 blocks (see Figure 32):
This space is composed of a 4 Kbytes Flash memory organized in 32 pages of 128
bytes. It contains the user’s application code.
This row is a part of flash memory and has a size of 128 bytes. The extra row may con-
tain information for boot loader usage.
The Hardware Security Byte space is a part of flash memory and has a size of 1 byte.
The 4 MSB can be read/written by software, the 4 LSB can only be read by software and
written by hardware in parallel mode.
The column latches, also part of flash memory, have a size of full page (128 bytes).
The column latches are the entrance buffers of the three previous memory locations
(user array, XROW and Hardware security byte).
The CPU interfaces to the Flash memory through the FCON register used to:
–
–
–
–
–
Extra Row (128 bytes)
Hardware Security (1 byte)
Column Latches (128 bytes)
The memory array (user space) 4 Kbytes
The Extra Row
The Hardware security bits
The column latch registers
Map the memory spaces in the adressable space
0FFFh
0000h
Flash memory
user space
4 Kbytes
4311C–8051–02/08