AT32UC3B0512 Atmel Corporation, AT32UC3B0512 Datasheet - Page 398

• Manufacturer Part Number: AT32UC3B0512
• Manufacturer: Atmel Corporation

Specifications of AT32UC3B0512

• Flash (kbytes): 512 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 60 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 44
• Ext Interrupts: 44
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 4
• Twi (i2c): 1
• Uart: 3
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 96
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Operating Voltage (vcc): 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 10
• Output Compare Channels: 16
• Input Capture Channels: 6
• Pwm Channels: 13
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Table 22-4.
32059L–AVR32–01/2012
0x071C
0x072C
0x073C
0x074C
0x075C
0x0714
0x0718
0x0720
0x0724
0x0728
0x0730
0x0734
0x0738
0x0740
0x0744
0x0748
0x0750
0x0754
0x0758
0x0760
0x0764
0x0768
Offset
USBB Register Memory Map
Host DMA Channel 2 Next Descriptor Address
Host DMA Channel 3 Next Descriptor Address
Host DMA Channel 4 Next Descriptor Address
Host DMA Channel 5 Next Descriptor Address
Host DMA Channel 6 Next Descriptor Address
Host DMA Channel 1 HSB Address Register
Host DMA Channel 2 HSB Address Register
Host DMA Channel 3 HSB Address Register
Host DMA Channel 4 HSB Address Register
Host DMA Channel 5 HSB Address Register
Host DMA Channel 6 HSB Address Register
Host DMA Channel 1 Control Register
Host DMA Channel 2 Control Register
Host DMA Channel 3 Control Register
Host DMA Channel 4 Control Register
Host DMA Channel 5 Control Register
Host DMA Channel 6 Control Register
Host DMA Channel 1 Status Register
Host DMA Channel 2 Status Register
Host DMA Channel 4 Status Register
Host DMA Channel 5 Status Register
Host DMA Channel 3Status Register
Register
Register
Register
Register
Register
Register
NEXTDESC
NEXTDESC
NEXTDESC
NEXTDESC
NEXTDESC
CONTROL
CONTROL
CONTROL
CONTROL
CONTROL
CONTROL
UHDMA1
UHDMA1
UHDMA1
UHDMA2
UHDMA2
UHDMA2
UHDMA2
UHDMA3
UHDMA3
UHDMA3
UHDMA3
UHDMA4
UHDMA4
UHDMA4
UHDMA4
UHDMA5
UHDMA5
UHDMA5
UHDMA5
UHDMA6
UHDMA6
UHDMA6
STATUS
STATUS
STATUS
STATUS
STATUS
ADDR
ADDR
ADDR
ADDR
ADDR
ADDR
Name
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Access
Reset Value
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
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