AT32UC3A1256 Atmel Corporation, AT32UC3A1256 Datasheet - Page 741
AT32UC3A1256
Manufacturer Part Number
AT32UC3A1256
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(98 pages)
2.AT32UC3A0128.pdf
(826 pages)
3.AT32UC3A0128.pdf
(377 pages)
4.AT32UC3A0128.pdf
(33 pages)
5.AT32UC3A0128.pdf
(159 pages)
Specifications of AT32UC3A1256
Flash (kbytes)
256 Kbytes
Pin Count
100
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
69
Ext Interrupts
69
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
1
Uart
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0-3.6 or (1.65-1.95+3.0-3.6)
Operating Voltage (vcc)
3.0-3.6 or (1.65-1.95+3.0-3.6)
Fpu
No
Mpu / Mmu
Yes / No
Timers
10
Output Compare Channels
16
Input Capture Channels
6
Pwm Channels
13
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3A1256-U
Manufacturer:
ATMEL
Quantity:
496
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32058K AVR32-01/12
36. JTAG and Boundary Scan
36.1
36.2
Features
Overview
Rev.: 2.0.0.2
•
•
•
•
Figure 36-1 on page 742
troller is a state machine controlled by the TCK and TMS signals. The TAP Controller selects
either the JTAG Instruction Register or one of several Data Registers as the scan chain (shift
register) between the TDI-input and TDO-output. The Instruction Register holds JTAG instruc-
tions controlling the behavior of a Data Register.
The ID Register, Bypass Register, and the Boundary-Scan Chain are the Data Registers used
for board-level testing. The Reset Register can be used to keep the device reset during test or
programming.
The Service Access Bus (SAB) interface contains address and data registers for the Service
Access Bus, which gives access to on-chip debug, programming, and other functions in the
device. The SAB offers several modes of access to the address and data registers, as dis-
cussed in
Section 36.7
document.
IEEE1149.1 compliant JTAG Interface
Boundary-Scan Chain for board-level testing
Direct memory access and programming capabilities through JTAG interface
On-Chip Debug access in compliance with IEEE-ISTO 5001-2003 (Nexus 2.0)
Section
lists the supported JTAG instructions, with references to the description in this
36.6.4.
shows how the JTAG is connected in an AVR32 device. The TAP Con-
AT32UC3A
741
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