SC16C654BIA68,512 NXP Semiconductors, SC16C654BIA68,512 Datasheet - Page 39

ID QUAD UART 64BYTE 68PLCC

SC16C654BIA68,512

Manufacturer Part Number
SC16C654BIA68,512
Description
ID QUAD UART 64BYTE 68PLCC
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SC16C654BIA68,512

Features
False-start Bit Detection
Number Of Channels
4, QUART
Fifo's
64 Byte
Voltage - Supply
2.5V, 3.3V, 5V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
68-LCC (J-Lead)
Transmit Fifo
64Byte
Receive Fifo
64Byte
Transmitter And Receiver Fifo Counter
Yes
Data Rate
5Mbps
Package Type
PLCC
Operating Supply Voltage (max)
5.5V
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935274935512
SC16C654BIA68
SC16C654BIA68

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SC16C654BIA68,512
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Philips Semiconductors
10. Dynamic characteristics
Table 28:
T
9397 750 14965
Product data sheet
Symbol
t
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
1w
XTAL
6s
6h
7d
7w
7h
9d
12d
12h
13d
13w
13h
15d
16s
16h
17d
18d
19d
20d
21d
22d
23d
24d
25d
26d
27d
amb
, t
2w
= 40 C to +85 C; tolerance of V
Parameter
clock pulse duration
oscillator/clock frequency
address setup time
address hold time
IOR delay from chip select
IOR strobe width
chip select hold time from
IOR
read cycle delay
delay from IOR to data
data disable time
IOW delay from chip select
IOW strobe width
chip select hold time from
IOW
write cycle delay
data setup time
data hold time
delay from IOW to output
delay to set interrupt from
Modem input
delay to reset interrupt
from IOR
delay from stop to
set interrupt
delay from IOR to
reset interrupt
delay from start to set
interrupt
delay from IOW to transmit
start
delay from IOW to
reset interrupt
delay from stop to
set RXRDY
delay from IOR to
reset RXRDY
delay from IOW to
set TXRDY
Dynamic characteristics
Conditions
25 pF load
25 pF load
25 pF load
25 pF load
25 pF load
25 pF load
25 pF load
25 pF load
CC
=
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs
10 %, unless otherwise specified.
Rev. 02 — 20 June 2005
[1] [2]
10
-
0
0
10
77
0
20
-
-
10
20
0
25
20
15
-
-
-
-
-
-
8T
[3]
-
-
-
-
Min
RCLK
V
CC
= 2.5 V
-
48
-
-
-
-
-
-
77
15
-
-
-
-
-
-
100
100
100
1T
100
100
24T
[3]
100
1T
100
100
[3]
[3]
Max
RCLK
RCLK
RCLK
6
-
0
0
10
26
0
20
-
-
10
20
0
25
20
5
-
-
-
-
-
-
8T
-
-
-
-
[3]
SC16C654B/654DB
Min
RCLK
V
CC
= 3.3 V
-
80
-
-
-
-
-
-
26
15
-
-
-
-
-
-
33
24
24
1T
29
45
24T
[3]
45
1T
45
45
[3]
[3]
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Max
RCLK
RCLK
RCLK
6
0
0
10
23
0
20
-
-
10
15
0
20
15
5
-
-
-
-
-
-
8T
[3]
-
-
-
-
Min
RCLK
V
CC
= 5.0 V
-
80
-
-
-
-
-
-
23
15
-
-
-
-
-
-
29
23
23
1T
28
40
24T
40
1T
40
40
[3]
[3]
[3]
Max
RCLK
RCLK
RCLK
39 of 58
Unit
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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