SC16IS752IBS,151 NXP Semiconductors, SC16IS752IBS,151 Datasheet - Page 19

• Manufacturer Part Number: SC16IS752IBS,151
• Description: IC UART DUAL I2C/SPI 32-HVQFN
• Manufacturer: NXP Semiconductors
• Type: IrDA or RS- 232 or RS- 485r

Specifications of SC16IS752IBS,151

• Number Of Channels: 2, DUART
• Package / Case: 32-VFQFN Exposed Pad
• Features: Low Current
• Fifo's: 64 Byte
• Protocol: RS232, RS485
• Voltage - Supply: 2.5V, 3.3V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• Mounting Type: Surface Mount
• Data Rate: 5 Mbps
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.3 V
• Supply Current: 6 mA
• Maximum Operating Temperature: + 95 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 2.5 V or 3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 568-4000 - DEMO BOARD SPI/I2C TO DUAL UART568-3510 - DEMO BOARD SPI/I2C TO UART
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-2236; 935279288151; SC16IS752IBS-S

NXP Semiconductors
8. Register descriptions
SC16IS752_SC16IS762_7
Product data sheet
The programming combinations for register selection are shown in
Table 9.
[1]
[2]
[3]
[4]
Register name Read mode
RHR/THR
IER
IIR/FCR
LCR
MCR
LSR
MSR
SPR
TCR
TLR
TXLVL
RXLVL
IODir
IOState
IOIntEna
IOControl
EFCR
DLL
DLH
EFR
XON1
XON2
XOFF1
XOFF2
MCR[7] can only be modified when EFR[4] is set.
Accessible only when ERF[4] = 1 and MCR[2] = 1, that is, EFR[4] and MCR[2] are read/write enables.
Accessible only when LCR[7] is logic 1.
Accessible only when LCR is set to 1011 1111b (0xBF).
Register map - read/write properties
Receive Holding Register (RHR)
Interrupt Enable Register (IER)
Interrupt Identification Register (IIR)
Line Control Register (LCR)
Modem Control Register (MCR)
Line Status Register (LSR)
Modem Status Register (MSR)
Scratchpad Register (SPR)
Transmission Control Register (TCR)
Trigger Level Register (TLR)
Transmit FIFO Level register
Receive FIFO Level register
I/O pin Direction register
I/O pins State register
I/O Interrupt Enable register
I/O pins Control register
Extra Features Control Register
Divisor Latch LSB (DLL)
Divisor Latch MSB (DLH)
Enhanced Features Register (EFR)
Xon1 word
Xon2 word
Xoff1 word
Xoff2 word
Dual UART with I
Rev. 07 — 19 May 2008
[4]
[4]
[4]
[4]
[3]
[3]
2
SC16IS752/SC16IS762
[2]
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
[1]
[4]
[2]
Write mode
Transmit Holding Register (THR)
Interrupt Enable Register
FIFO Control Register (FCR)
Line Control Register
Modem Control Register
n/a
n/a
Scratchpad Register
Transmission Control Register
Trigger Level Register
n/a
n/a
I/O pin Direction register
n/a
Interrupt Enable register
I/O pins Control register
Extra Features Control Register
Divisor Latch LSB
Divisor Latch MSB
Enhanced Features Register
Xon1 word
Xon2 word
Xoff1 word
Xoff2 word
[4]
[4]
[4]
[4]
Table
© NXP B.V. 2008. All rights reserved.
[3]
[3]
9.
[2]
[1]
[4]
19 of 59
[2]