SI3220-KQ Silicon Laboratories Inc, SI3220-KQ Datasheet - Page 70

• Manufacturer Part Number: SI3220-KQ
• Description: IC SLIC/CODEC DUAL-CH 64TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: ProSLIC®r

Specifications of SI3220-KQ

• Package / Case: *
• Function: Subscriber Line Interface Concept (SLIC), CODEC
• Interface: GCI, PCM, SPI
• Number Of Circuits: 2
• Voltage - Supply: 3.3V, 5V
• Current - Supply: 65mA
• Power (watts): 941mW
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Includes: Battery Switching, BORSCHT Functions, DTMF Generation and Decoding, FSK Tone Generation, Modem and Fax Tone Detection
• Product: Telecom
• Supply Voltage (min): 3.13 V
• Supply Current: 22 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Number Of Channels: 2
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Si3220/Si3225
PCM Companding
The Dual ProSLIC devices support both µ-255 Law (µ-
Law) and A-Law companding formats in addition to
Linear Data mode. The data format is selected via the
PCMF bits of the PCM Mode Select register. µ-Law
mode is more commonly used in North America and
Japan, and A-Law is primarily used in Europe and other
countries. These 8-bit companding schemes follow a
segmented curve formatted as a sign bit (MSB) followed
by three chord bits and four step bits. A-Law typically
uses a scheme of inverting all even bits while µ-Law
does not. Dual ProSLIC devices also support A-Law
with inversion of even bits, inversion of all bits, or no bit
inversion by programming the ALAW bits of the PCM
Mode Select register to the appropriate setting. Tables
70
PCLK_CNT
PCLK_CNT
Figure 54. 16-Bit Linear Mode Example, Timeslots 1 and 2, Long FSYNC
Figure 53. Example, IDL2 Long FSYNC, B2, 10-Bit Mode (TXS/RXS = 10)
FSYNC
FSYNC
PCLK
PCLK
DRX
DRX
DTX
DTX
HI-Z
HI-Z
0
0
1
1
MSB
MSB
2
2
3
3
4
4
5
5
Preliminary Rev. 0.91
6
6
7
7
8
8
38 and 39 define the µ-Law and A-Law encoding
formats.
The Dual ProSLIC devices also support a 16-bit linear
data format with no companding. This Linear mode is
typically used in systems that convert to another
companding format such as adaptive delta PCM
(ADPCM) or systems that perform all companding in an
external DSP. The data format is 2’s complement with
MSB first (sign bit). Transmitting and receiving data via
Linear mode requires two continuous time slots. An 8-bit
Linear mode enables 8-bit transmission without
companding.
9
9
10
10
11
11
MSB
MSB
12
12
13
13
14
14
15
15
16
16
LSB
LSB
17
17
18
18
LSB
LSB
HI-Z
HI-Z