3222/3223-DB1 Silicon Laboratories Inc, 3222/3223-DB1 Datasheet - Page 39

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3222/3223-DB1

Manufacturer Part Number
3222/3223-DB1
Description
EVAL BOARD FOR IA3222/3223
Manufacturer
Silicon Laboratories Inc
Series
EZ DAA™r
Datasheets

Specifications of 3222/3223-DB1

Main Purpose
Telecom, Data Acquisition Arrangement (DAA)
Embedded
Yes, FPGA / CPLD
Utilized Ic / Part
IA3222, IA3223
Primary Attributes
-
Secondary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
7.3. Line-Side Programming Registers
LP1 Setting: 0, current sensor enabled; 1, current sensor disabled (recommended when current sensor is not
required)
The Line Side is programmed when any of the following conditions is fulfilled: (1) after going from on-hook to off-
hook; (2) when the Line Side LSB programming register is updated by the user or (3) after recovering from a loop-
current interruption (line drop).
*Note: This mode is not allowed in 600  + 1 µF or 900  + 1 µF impedance mode.
Notes:
LP3 LP2 LP0
LP5
0
0
0
0
1
1
1
1
0
0
1
1
1. This mode is not allowed with low or lowest transmit voltage headroom.
2. When using LP[3,2,0]=110 you must use the application schematic in schematic 3.3 for Legacy TBR21 Current-Limit
Support. Using this setting with the standard schematic in section 3.2 may result in circuit damage.
0
0
1
1
0
0
1
1
LP4
0
1
0
1
0
1
0
1
0
1
0
1
New Zealand complex impedance
TBR21 complex impedance with
ES 203 021, Australia or China
600 Ω or 600 Ω + 2.16 µF
complex impedance
600 Ω + 1 µF
900 Ω + 1 µF
current limit
Reserved
High transmit voltage headroom and dc voltage drop (reset state)
Setting
900 Ω
Lowest transmit voltage headroom and dc voltage drop*
Normal transmit voltage headroom and dc voltage drop
Low transmit voltage headroom and dc voltage drop*
2
1
1
Rev. 5.0
IA3222A IA3222B
Yes
Setting
Yes
Yes
Yes
Yes
Yes
Yes
Yes
(IA3222B Only)
C
X
Required?
Yes
Yes
Yes
IA3222/23
(IA3222B Only)
C
X1
Required?
Yes
Yes
Yes
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