AD8114AST Analog Devices Inc, AD8114AST Datasheet - Page 19

• Manufacturer Part Number: AD8114AST
• Description: IC VIDEO CROSSPOINT SWIT 100LQFP
• Manufacturer: Analog Devices Inc

Specifications of AD8114AST

• Rohs Status: RoHS non-compliant
• Function: Video Crosspoint Switch
• Circuit: 1 x 16:16
• Voltage Supply Source: Dual Supply
• Voltage - Supply, Single/dual (±): ±4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Array Configuration: 16x16
• Number Of Arrays: 1
• Screening Level: Industrial
• Pin Count: 100
• Package Type: LQFP
• Power Supply Requirement: Dual
• Lead Free Status / RoHS Status: Not Compliant

If more than one AD8114/AD8115 device is to be serially
programmed in a system, the DATA OUT signal from one
device can be connected to the DATA IN of the next device to
form a serial chain. All of the CLK, CE , UPDATE , and SER
/PAR pins should be connected in parallel and operated as
described above. The serial data is input to the DATA IN pin of
the first device of the chain, and it will ripple on through to the
last. Therefore, the data for the last device in the chain should
come at the beginning of the programming sequence. The
length of the programming sequence (80 bits) will be multiplied
by the number of devices in the chain.
Parallel Programming
While using the parallel programming mode, it is not necessary
to reprogram the entire device when making changes to the
matrix. In fact, parallel programming allows the modification of
a single output at a time. Since this takes only one
CLK/ UPDATE cycle, significant time savings can be realized by
using parallel programming.
One important consideration in using parallel programming is
that the RESET signal does not reset all registers in the
AD8114/AD8115. When taken low, the RESET signal will only
set each output to the disabled state. This is helpful during
power-up to ensure that two parallel outputs will not be active
at the same time.
After initial power-up, the internal registers in the device will
generally have random data, even though the RESET signal was
asserted. If parallel programming is used to program one
output, then that output will be properly programmed, but the
rest of the device will have a random program state depending
on the internal register content at power-up. Therefore, when
using parallel programming, it is essential that all outputs be
programmed to a desired state after power-up. This will ensure
that the programming matrix is always in a known state. From
then on, parallel programming can be used to modify a single
output or more at a time.
In similar fashion, if both CE and UPDATE are taken low after
initial power-up, the random power-up data in the shift register
will be programmed into the matrix. Therefore, to prevent the
crosspoint from being programmed into an unknown state, do
not apply low logic levels to both CE and UPDATE after power
is initially applied. Programming the full shift register one time
to a desired state by either serial or parallel programming after
initial power-up will eliminate the possibility of programming
the matrix to an unknown state.
To change an output’s programming via parallel programming,
SER /PAR and UPDATE should be taken high and CE should be
taken low. The CLK signal should be in the high state. The 4-bit
address of the output to be programmed should be put on A0 to
A3. The first four data bits (D0 to D3) should contain the
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information that identifies the input that gets programmed to
the output that is addressed. The fourth data bit (D4) will
determine the enabled state of the output. If D4 is low (output
disabled), then the data on D0 to D3 does not matter.
After the desired address and data signals have been established,
they can be latched into the shift register by a high to low
transition of the CLK signal. The matrix will not be
programmed, however, until the UPDATE signal is taken low. It
is thus possible to latch in new data for several or all of the
outputs first via successive negative transitions of CLK while
UPDATE is held high, and then have all the new data take effect
when UPDATE goes low. This technique should be used when
programming the device for the first time after power-up when
using parallel programming.
POWER-ON RESET
When powering up the AD8114/AD8115, it is usually desirable
to have the outputs come up in the disabled state. When taken
low, the RESET pin will cause all outputs to be in the disabled
state. However, the RESET signal does not reset all registers in
the AD8114/AD8115. This is important when operating in the
parallel programming mode. Please refer to that section for
information about programming internal registers after power-
up. Serial programming will program the entire matrix each
time, so no special considerations apply.
Since the data in the shift register is random after power-up, it
should not be used to program the matrix, or the matrix can
enter unknown states. To prevent this, do not apply logic low
signals to both CE and UPDATE initially after power-up. The
shift register should first be loaded with the desired data, and
then UPDATE can be taken low to program the device.
The RESET pin has a 20 kΩ pull-up resistor to DVDD that can
be used to create a simple power-up reset circuit. A capacitor
from RESET to ground will hold RESET low for some time
while the rest of the device stabilizes. The low condition will
cause all the outputs to be disabled. The capacitor will then
charge through the pull-up resistor to the high state, thus
allowing full programming capability of the device.
GAIN SELECTION
The 16 × 16 crosspoints come in two versions, depending on
the gain of the analog circuit paths that is desired. The AD8114
device is unity gain and can be used for analog logic switching
and other applications where unity gain is desired. The AD8114
can also be used for the input and interior sections of larger
crosspoint arrays where termination of output signals is not
usually used. The AD8114 outputs have very high impedance
when their outputs are disabled.
The AD8115 can be used for devices that will be used to drive a
terminated cable with its outputs. This device has a built-in gain
AD8114/AD8115