NUC130VE3CN Nuvoton Technology Corporation of America, NUC130VE3CN Datasheet - Page 401

• Manufacturer Part Number: NUC130VE3CN
• Description: IC MCU 32BIT 128KB FLASH 100LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro™ NUC100r

Specifications of NUC130VE3CN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

CAN Status Register (CAN_STATUS)
Register
CAN_STATUS CAN0_BA+0x04
Bits
[31:8]
[7]
[6]
[5]
[4]
[3]
[2:0]
BOFF
31
23
15
7
NuMicro™ NUC130/NUC140 Technical Reference Manual
Descriptions
Reserved
BOff
EWarn
EPass
RxOK
TxOK
LEC
Offset
EWarn
30
22
14
6
Reserved
This is a reserved bit. This bit is always read as ‘0’ and must always be written with ‘0’.
Busoff Status (Read Only)
1 = The CAN module is in busoff state.
0 = The CAN module is not in busoff state.
Error Warning Status (Read Only)
1 = At least one of the error counters in the EML has reached the error warning limit of
0 = Both error counters are below the error warning limit of 96.
Error Passive (Read Only)
1 = The CAN Core is in the error passive state as defined in the CAN Specification.
0 = The CAN Core is error active.
Received a Message Successfully
1 = A message has been successfully received since this bit was last reset by the CPU
0 = No message has been successfully received since this bit was last reset by the CPU.
Transmitted a Message Successfully
1 = Since this bit was last reset by the CPU, a message has been successfully (error free
0 = Since this bit was reset by the CPU, no message has been successfully transmitted.
Last Error Code (Type of the last error to occur on the CAN bus)
The LEC field holds a code, which indicates the type of the last error to occur on the
CAN bus. This field will be cleared to ‘0’ when a message has been transferred
(reception or transmission) without error. The unused code ‘7’ may be written by the CPU
EPass
R/W
R/W
96.
(independent of the result of acceptance filtering).
This bit is never reset by the CAN Core.
and acknowledged by at least one other node) transmitted.
This bit is never reset by the CAN Core.
29
21
13
5
Description
CAN Status Register
RxOK
28
20
12
4
- 401 -
Reserved
Reserved
Reserved
TxOK
27
19
11
3
Publication Release Date: June 14, 2011
26
18
10
2
LEC
25
17
9
1
Revision V2.01
Reset Value
0x0000_0000
24
16
8
0