SI2110-D-FM Silicon Laboratories Inc, SI2110-D-FM Datasheet - Page 22

• Manufacturer Part Number: SI2110-D-FM
• Manufacturer: Silicon Laboratories Inc

Specifications of SI2110-D-FM

• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Compliant

Si2107/08/09/10
In serial mode, the transport stream clock rate range is
determined by the TSSCR register. The exact rate is
determined during the acquisition process. The range
that minimizes the difference between the effective
transport stream data rate and the clock rate should be
chosen. The recommended settings are listed in
Table 15.
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Table 15. Serial MPEG-TS Clock Frequency
TSSCR
00
01
10
11
40–50 Mbaud
30–40 Mbaud
19–30 Mbaud
1–19 Mbaud
Baud Rate
Serial Clock Rate
76.8–82.8 MHz
54.9–59.2 MHz
80–88.5 MHz
35–37.7 MHz
Rev. 1.0
Figure 12 illustrates parallel data modes. Figure 13
illustrates serial data modes. The device has one output
pin (pin 30), which can be configured as either a
receiver lock indicator, general purpose output, or
interrupt output, using the pin select register, PSEL. The
receiver lock indicator provides a signal output for
register bit RCVL. The general purpose output reflects
the polarity of register bit GPO. The interrupt output is
discussed further in “6.2. Interrupts”.
The user can configure the device such that
components of the channel decoder are bypassed. This
is controlled by the energy-dispersal descrambler
bypass bit, DS_BP, the Reed-Solomon decoder bypass
bit, RS_BP, and the convolutional de-interleaver bypass
bit, DI_BP. The use of these bypass options is defined
for the implementation of a BER test on a known
modulated PRBS data sequence as explained later in
"6.5. Channel Decoder" on page 29.