CY7C131-15JI Cypress Semiconductor Corp, CY7C131-15JI Datasheet - Page 5

• Manufacturer Part Number: CY7C131-15JI
• Description: SRAM Chip Async Dual 5V 8K-Bit 1K x 8 15ns 52-Pin PLCC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C131-15JI

• Package: 52PLCC
• Timing Type: Asynchronous
• Density: 8 Kb
• Typical Operating Supply Voltage: 5 V
• Address Bus Width: 10 Bit
• Number Of I/o Lines: 8 Bit
• Number Of Ports: 2
• Number Of Words: 1K

Switching Characteristics
Document #: 38-06002 Rev. *D
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Shaded areas contain preliminary information.
Note:
11. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and output loading of the specified
12. AC Test Conditions use V
13. At any given temperature and voltage condition for any given device, t
14. t
15. The internal write time of the memory is defined by the overlap of CS LOW and R/W LOW. Both signals must be low to initiate a write and either signal can
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
WC
SCE
AW
HA
SA
PWE
SD
HD
HZWE
LZWE
READ CYCLE
WRITE CYCLE
Parameter
I
terminate a write by going high. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.
OL
LZCE
/I
OH,
, t
LZWE
and 30-pF load capacitance.
, t
HZOE
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low Z
OE HIGH to High Z
CE LOW to Low Z
CE HIGH to High Z
CE LOW to Power-Up
CE HIGH to Power-Down
Write Cycle Time
CE LOW to Write End
Address Set-Up to Write End
Address Hold from Write End
Address Set-Up to Write Start
R/W Pulse Width
Data Set-Up to Write End
Data Hold from Write End
R/W LOW to High Z
R/W HIGH to Low Z
[15]
, t
LZOE
, t
OH
HZCE
= 1.6V and V
and t
HZWE
Description
[9, 13, 14]
[9, 13, 14]
[14]
[14]
Over the Operating Range
[9, 13, 14]
[9, 13, 14]
OL
are tested with C
[12]
[9]
[12]
= 1.4V.
[12]
[9]
L
= 5pF as in part (b) of AC Test Loads. Transition is measured ±500 mV from steady state voltage.
HZCE
[6, 11]
is less than t
Min.
7C131-15
15
15
12
12
12
10
0
3
3
0
2
0
0
0
7C141-15
LZCE
Max.
and t
15
15
10
10
10
15
10
[3]
HZOE
is less than t
Min.
7C130-25
25
25
20
20
15
15
0
3
5
0
2
0
0
0
7C131-25
7C140-25
7C141-25
LZOE
CY7C130/CY7C131
CY7C140/CY7C141
Max.
25
25
15
15
15
25
15
[3]
.
Min.
30
30
25
25
25
15
0
3
5
0
2
0
0
0
7C130-30
7C131-30
7C140-30
7C141-30
Max.
30
30
20
15
15
25
15
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Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns