LMX9830SMX National Semiconductor, LMX9830SMX Datasheet - Page 3

• Manufacturer Part Number: LMX9830SMX
• Manufacturer: National Semiconductor

Specifications of LMX9830SMX

• Lead Free Status / Rohs Status: Not Compliant

X1_CKO
X1_CKI
X2_CKI
X2_CKO
RESET_RA#
B_RESET_RA#
RESET_BB#
ENV1#
TE
TST1/DIV2#
TST2
TST3
TST4
TST5
TST6
MDODI (Note 2)
OP6/SCL/MSK
7.0 Connection Diagram
7.1 PAD DESCRIPTIONS
Pad Name
Pad Location
FBGA, Plastic, Laminate, 9x6x1.2mm, 60 Ball, 0.8mm Pitch Package (SLF60A)
B10
E7
E5
B8
B6
B7
C6
A9
C7
C8
C9
D8
D9
D1
C1
F7
F5
SCL/MSK: I/O
OP6: I
Type
I/O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
TABLE 1. Pin Descriptions
Default Layout
See Table 16
(if not used)
(if not used)
VCO_OUT
GND
GND
GND
GND
GND
GND
NC
NC
NC
NC
3
Crystal 10-20 MHz
Crystal or External Clock 10-20 MHz
32.768 kHz Crystal Oscillator
32.768 kHz Crystal Oscillator
Radio Reset (active low)
Buffered Reset Radio Output (active low)
Baseband Reset (active low)
ENV1: Environment Select (active low) used for
manufacturing test only
Test Enable - Used for manufacturing test only
TST1: Test Mode. Leave not connected to permit use
with VTune automatic tuning algorithm
DIV2#: No longer supported
Test Mode, Connect to GND
Test Mode, Connect to GND
Test Mode, Connect to GND
Test Mode, Connect to GND
Test Input,
Connect to VCO_OUT via 0 Ω resistor to permit use
with VTune automatic tuning algorithm
SPI Master Out Slave In
OP6: Pin checked during Startup Sequence for
configuration option
SCL: ACCESS.Bus Clock
MSK: SPI Shift
Description
www.national.com
20180001