LMX9830SMX National Semiconductor, LMX9830SMX Datasheet - Page 13

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LMX9830SMX

Manufacturer Part Number
LMX9830SMX
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of LMX9830SMX

Lead Free Status / Rohs Status
Not Compliant
OP4/PG4
PG6
PG7
t
t
PTORRA
PTORBB
In alternate function the pins have pre-defined indication func-
tionality. Please see Table 13 for a description on the alter-
nate indication functionality.
9.5 SYSTEM POWER UP
In order to correctly power-up the LMX9830 the following se-
quence is recommended to be performed:
Apply VCC_IO and V
The RESET_RA# should be driven high. Then RESET_BB#
should be driven high at a recommended time of 1ms after
Note 28: Rise time on power must switch on fast, rise time <500us.
Note 29: Recommended value.
Symbol
Power to Reset _RA#
Reset_RA# to Reset_BB#
Pin
CC
Parameter
to the LMX9830.
Operation Mode pin to configure Transport Layer settings during boot-up
GPIO
RF Traffic indication
TABLE 13. Alternate GPIO Pin Configuration
FIGURE 1. LMX9830 Power on Reset Timing
TABLE 14. LMX9830 Power to Reset timing
V
level to valid reset
V
level to valid reset
CC
CC
and VCC_IO at operating voltage
and VCC_IO at operating voltage
Condition
13
the LMX9830 voltage rails are high. The LMX9830 is properly
reset.
Please see timing diagram, Figure 1.
ESR of the crystal also has impact on the startup time of the
crystal oscillator circuit of the LMX9830 (See Table 14 and
Table 15).
Description
(Note 28)
(Note 29)
<500
Min
1
Typ
Max
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20180009
Unit
ms
µs

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