DS90CF581MTD National Semiconductor, DS90CF581MTD Datasheet - Page 4

• Manufacturer Part Number: DS90CF581MTD
• Manufacturer: National Semiconductor

Specifications of DS90CF581MTD

• Number Of Elements: 4
• Number Of Receivers: 28
• Number Of Drivers: 4
• Input Type: CMOS/TTL
• Operating Supply Voltage (typ): 5V
• Output Type: Flat Panel Display
• Differential Output Voltage: 450mV
• Power Dissipation: 1.63W
• Operating Temp Range: -10C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 56
• Package Type: TSSOP
• Lead Free Status / Rohs Status: Not Compliant

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LLHT
LHLT
TCIT
TCCS
TPPos0
TPPos1
TPPos2
TPPos3
TPPos4
TPPos5
TPPos6
TPPos0
TPPos1
TPPos2
TPPos3
TPPos4
TPPos5
TPPos6
TCIP
TCIH
TCIL
TSTC
THTC
TCCD
TPLLS
TPDD
Symbol
Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the device
should be operated at these limits. The tables of “Electrical Characteristics” specify conditions for device operation.
Note 2: Typical values are given for V
Note 3: Current into device pins is defined as positive. Current out of device pins is defined as negative. Voltages are referenced to ground unless otherwise
specified (except V
Note 4: ESD Rating: HBM (1.5 kΩ, 100 pF)
Note 5: V
Transmitter Switching Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified
Note 6: This limit based on bench characterization.
PLL V
All other pins
EIAJ (0Ω, 200 pF)
CC
OS
LVDS Low-to-High Transition Time
LVDS High-to-Low Transition Time
TxCLK IN Transition Time
TxOUT Channel-to-Channel Skew
Transmitter Output Pulse Position for Bit 0
Transmitter Output Pulse Position for Bit 1
Transmitter Output Pulse Position for Bit 2
Transmitter Output Pulse Position for Bit 3
Transmitter Output Pulse Position for Bit 4
Transmitter Output Pulse Position for Bit 5
Transmitter Output Pulse Position for Bit 6
Transmitter Output Pulse Position for Bit 0
Transmitter Output Pulse Position for Bit 1
Transmitter Output Pulse Position for Bit 2
Transmitter Output Pulse Position for Bit 3
Transmitter Output Pulse Position for Bit 4
Transmitter Output Pulse Position for Bit 5
Transmitter Output Pulse Position for Bit 6
TxCLK IN Period
TxCLK IN High Time
TxCLK IN Low Time
TxIN Setup to TxCLK IN
TxIN Hold to TxCLK IN
TxCLK IN to TxCLK OUT Delay @ 25°C, V
Transmitter Phase Lock Loop Set
Transmitter Powerdown Delay
≥
previously referred as V
1000V
≥
2000V
OD
≥
and ΔV
150V
OD
).
(Figure
CM
(Figure
CC
(Figure
.
(Figure
= 5.0V and T
(Figure
6)
(Figure
12486 Version 6 Revision 2
6)
6)
(Figure
6)
6)
(Figure
A
4)
(Note
(Figure
(Figure
= +25°C.
Parameter
10)
6)
8)
(Figure
(Figure
CC
3)
3)
(Figure
= 5.0V
11)
11)
5)
Print Date/Time: 2009/10/26 14:44:32
(Figure
4
7)
f = 20 MHz
f = 40 MHz
f = 20 MHz
f = 40 MHz
0.35T
0.35T
−200
−100
12.8
27.2
34.5
42.2
20.3
Min
6.3
2.9
6.1
9.7
2.5
20
13
17
25
14
8
5
0.5T
0.5T
0.75
0.75
13.6
20.8
35.2
42.6
10.2
13.5
17.4
20.8
Typ
150
100
7.2
3.3
6.6
28
T
2
0.65T
0.65T
Max
14.6
21.5
28.5
35.6
42.9
10.7
14.1
17.8
21.4
350
350
300
100
1.5
1.5
7.5
3.9
7.1
9.7
50
10
8
Units
ms
ns
ns
ns
ps
ps
ns
ns
ns
ns
ns
ns
ps
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns