AM7969-175JC AMD (ADVANCED MICRO DEVICES), AM7969-175JC Datasheet - Page 92
AM7969-175JC
Manufacturer Part Number
AM7969-175JC
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.AM7969-175JC.pdf
(127 pages)
Specifications of AM7969-175JC
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Package Type
PLCC
Mounting
Surface Mount
Pin Count
28
Lead Free Status / Rohs Status
Not Compliant
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Part Number
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Quantity
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Part Number:
AM7969-175JC
Manufacturer:
AMD
Quantity:
20 000
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Figure 8-1
88
AMD
This serves to flush all extraneous data from the buffers and reset all internal state
machines. Once this is completed the Transmitter may be Strobed. X1 should be left in
the LOW state upon completion of the initialization.
The STRB input must now be strobed only once every n = 10 bitclk pulses or more. This
will allow time for an 8 bit wide byte to be encoded to 10 bits and shifted out one bit
every clock pulse.
The parallel data input pins are provided with new data every 10 bitclk pulses. Setup
and hold times remain the same as in non-Test Mode with respect to STRB. (In the
non-Test modes, the clock rate is the byte rate and a new data word and a strobe is
provided every clock pulse. In test mode, the clock rate is the bit rate so the new data
word and strobe are provided every n clock pulses).
In Test Mode the Receiver expects only single ended data. Thus only one of the
SEROUT lines from the Transmitter is used. However, both lines must have pulldown
resistors to electrically balance the outputs.
Transmitter Test Mode Connections
Command IN
4, 3, 2
Data IN
8, 9, 10
or Byte Rate
Divide By n
Clock
TAXIchip Integrated Circuits Technical Manual
300
ACK
STROBE
SEROUT+
Am7968
TLS
N/C
SEROUT–
Media Interface
RESET
DMS
CLK
CLS
X1
X2
300
N/C = Test Mode
Can Be Set
for 8, 9, or
10-Bit Mode
To Receiver
12330E-35
Generator
Bit Rate
Clock
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