AM7969-175JC AMD (ADVANCED MICRO DEVICES), AM7969-175JC Datasheet - Page 82

AM7969-175JC

Manufacturer Part Number
AM7969-175JC
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of AM7969-175JC

Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Package Type
PLCC
Mounting
Surface Mount
Pin Count
28
Lead Free Status / Rohs Status
Not Compliant

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Figure 7-3
V
78
*Transmission line terminations not shown.
CC
SERIN–
CNB
CSTRB CMD DATA DSTRB VLTN
AMD
SERIN+
PRIMARY RX
CLK
Am7969
X1 is connected to a common Crystal Oscillator or a TTL Clock Source. It is not
recommended that X1 be connected to another Receiver’s CLK output.
X2 is grounded.
The DMS pins of all TAXls must be tied in the same state as the DMS pins on the
Transmitters.
The CSTRB/DSTRB pins on each of the Receivers are all active simultaneously. A
timing description for CSTRB and DSTRB is included in Appendix C, TAXI TIP #89-10
TAXI receiver CSTRB and DSTRB pulse width .
The VLTN pin has timing that is identical to the timing of the Data Out and the Com-
mand Out lines. Its connections are specific to each user’s applications.
If CNB is HIGH, the Receiver will catch the next valid byte of data and hold it. It will not
attempt to catch any more data until it sees a Sync command from the Transmitter or
until its CNB goes LOW and then HIGH again.
Receivers in Cascade Mode
The following section describes the functionality of individual pins:
The DSTRB Pin
Any one of the DSTRBs may be used as the user’s DSTRB to his system. When an
entire word has been received (signified internally by a Sync from the Transmitter) the
data in the Receivers are latched out to the output ports and all the DSTRBs are raised
(simultaneously) one cycle later. Likewise, if Commands are sent as part of the cascade
word, the CSTRB/DSTRB connections must be made appropriately.
Timing description for receivers in cascade mode is included in Figure 7-4.
D23-D16
RX1
X2
X1
DMS
IGM
TAXIchip Integrated Circuits Technical Manual
SERIN–
12.5 MHz
Crystal
CNB
CSTRB CMD DATA DSTRB VLTN
OSC
SERIN+
Am7969
D15-D8
RX2
X2
DMS
IGM
X1
SERIN–
CNB
CSTRB CMD DATA DSTRB VLTN
SERIN+
Am7969
D7-D0
RX3
X2
12330E-25
DMS
IGM
X1
N/C

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