A40MX04-FPQG100 MICROSEMI, A40MX04-FPQG100 Datasheet - Page 26

• Manufacturer Part Number: A40MX04-FPQG100
• Manufacturer: MICROSEMI

Specifications of A40MX04-FPQG100

• Family Name: 40MX
• Number Of Usable Gates: 6000
• Number Of Logic Blocks/elements: 547
• # Registers: 273
• # I/os (max): 69
• Frequency (max): 50/83MHz
• Process Technology: 0.45um (CMOS)
• Operating Supply Voltage (typ): 3.3/5V
• Logic Cells: 547
• Device System Gates: 6000
• Propagation Delay Time: 3.7/2.7ns
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 5.25V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: PQFP
• Lead Free Status / Rohs Status: Compliant

Output Drive Characteristics for 3.3V PCI Signaling
Table 19 •
Table 20 •
1 -2 0
Symbol
V
V
V
I
I
V
V
C
C
L
Notes:
1. PCI Local Bus Specification, Version 2.1, Section 4.2.2.1.
2. Maximum rating for V
3. Dependent upon the chosen package. PCI recommends QFP and BGA packaging to reduce pin inductance and capacitance.
Symbol
I
Slew (r)
Slew (f)
Note: *PCI Local Bus Specification, Version 2.1, Section 4.2.2.2.
IH
IL
CL
PIN
CCI
IH
IL
OH
OL
40MX and 42MX FPGA Families
IN
CLK
DC Specification (3.3V PCI Signaling)
AC Specifications for (3.3V PCI Signaling)*
Input High Leakage Current
Output Rise Slew Rate
Output Fall Slew Rate
Low Clamp Current
Supply Voltage for I/Os
Input Leakage Current
Input Pin Capacitance
Output High Voltage
CLK Pin Capacitance
Output Low Voltage
Input High Voltage
Input Low Voltage
Parameter
Pin Inductance
Parameter
CCI
–0.5V to 7.0V.
0.2V to 0.6V load
0.6V to 0.2V load
–5 < V
Condition
I
I
OUT
Condition
OUT
V
IN
6 mA
= –2 mA
= 3 mA,
IN
= 2.7V
1
≤
–1
v6.1
–25 + (V
Min.
–0.5
0.5
0.9
3.0
5
/0.015
Min.
1
1
PCI
IN
+1)
PCI
V
CC
Max.
–70
3.6
0.8
0.1
12
70
10
20
+ 0.5
Max.
4
4
Min.
–0.3
3.0
0.5
3.3
Min.
–60
1.8
2.8
MX
V
MX
0.1 V
< 8 nH
CCI
Max.
–10
3.6
0.8
10
10
10
+ 0.3
CCI
Max.
–10
3
2.8
4.0
Units
µA
µA
nH
pF
pF
Units
V
V
V
V
V
V/ns
V/ns
mA