W86L387D Winbond Electronics, W86L387D Datasheet

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W86L387D

Manufacturer Part Number
W86L387D
Description
Manufacturer
Winbond Electronics
Datasheet

Specifications of W86L387D

Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Operating Temperature (max)
70C
Package Type
LQFP
Rad Hardened
No
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
W86L387D
Manufacturer:
INTERSIL
Quantity:
5 810
W86L387D
W86L387D
Winbond Host Interface
TM
Memory Stick
Bridge
Publication Release Date: May 13, 2005
- i -
Revision A1

Related parts for W86L387D

W86L387D Summary of contents

Page 1

... W86L387D Winbond Host Interface Memory Stick - i - W86L387D TM Bridge Publication Release Date: May 13, 2005 Revision A1 ...

Page 2

... SET_CMD (Set Command to the Flash Controller of MS card) of TPC Commands 8.5 READ_PAGE_DATA (Read Page Data from the MS Card) of TPC Commands: ....... 21 8.6 WRITE_PAGE_DATA (Write Page Data from the MS Card) of TPC Commands: ...... 22 8.7 PIN[3:0] Access Sequential: ......................................................................................... 23 9. HOW TO READ THE TOP MARKING...................................................................................... 23 10. PACKAGE DIMENSIONS ......................................................................................................... 24 11. REFERENCE SCHEMATIC...................................................................................................... 25 12. REVISION HISTORY ................................................................................................................ W86L387D ...

Page 3

... It also supports DMA or Interrupt type of transfer mode to improve data transfer performance between host microprocessor and Memory Stick W86L387D is fit for most of IA devices, such as PDA, Cellular Phone, DSC, and MP3 player. 2. FEATURES Compliant with Sony Memory Stick ...

Page 4

... PIN CONFIGURATION A2 A1 XTYP D15/A0 D14 VSS VDD D13 D12 D11 D10 Fig.3-1 W86L387D Pin Assignment W86L387D PO0 23 PI3 22 PI2 21 PI1 20 PI0 19 VDD 18 VSS 17 SCLK 16 SDIO XTO 13 XTI ...

Page 5

... High byte (D15 to D8) write control pin, active low. Type 2: High byte (D15 to D8) data valid pin, active low. Type 1: Low byte (D7 to D0) write control pin, active low. Type 2: Low byte (D7 to D0) data valid pin, active low W86L387D Publication Release Date: May 13, 2005 Revision A1 ...

Page 6

... DMA transfer request pin, active low. Type 2: Bus cycle complete pin, active low. Host interface type 2 select pin type 1 mode type 2 mode. 4-bit parallel port input signal. 4-bit parallel port output signal. Reset input, hardware reset input, active low. Power supply 3.3V (2 pins). Ground (4 pins W86L387D ...

Page 7

... XINTN Interrupt Circuit HCKI XTYP2 RSTN Address Host I/F Decode Type Select Read /Write Register File 8 Byte FIFO Circuit 8 Byte FIFO Fig. 5-1 Block Diagram of W86L387D - 5 - W86L387D VDD VSS PI[3:0] Parallel Port Registers PO[3: Access Circuit SCLK Serial to Parallel SDIO Parallel to Serial ...

Page 8

... REGISTERS 6.1 Register Map The register in the W86L387D is consisted of command, status, control, received/transmit data buffer, interrupt, DMA and parallel port registers and READY register in Host interface type 2, these registers are listed as follows: ADDR REGISTER NAME A[3:1] B15 B14 (NOTE 1) 000 PID code Command Reg ...

Page 9

... Data size - - BIT BIT BIT BIT 9 BIT RBE RBF TBE TBF BIT BIT BIT 7 BIT 6 BIT RST PWD SIEN DAKEN NO_CRC W86L387D BIT BIT BIT BIT BIT BIT BIT BIT BIT 4 BIT 3 2 BSY_CNT Publication Release Date: May 13, 2005 Revision A1 0 ...

Page 10

... PWD (Power down): This bit = 1 is used to power down the internal logic and crystal driver. Set this bit to low will enabled the W86L387D when the W86L387D is in power down state. But the W86L387D will never enabled if Host interface type 2 is configured and the Host I/F clock (HCKI) input is disabled. ...

Page 11

... The data is located at bit[7:0] and address bit 0 must set 0 when write the transmit data buffer register with 8-bit data size of Host CPU. BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT Transmit data buffer BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT the TPC code is WRITE_PAGE_DATA - 9 - W86L387D Receive data buffer Transmit data buffer ...

Page 12

... PIN (Parallel input interrupt enable): This bit = 1 to enable the parallel input interrupt. BIT BIT BIT BIT BIT CRC TOE - - - 0 0 BIT BIT BIT BIT INT DREQ PIN - - - - W86L387D BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT ...

Page 13

... Fast bit is set high, otherwise the access cycle is 3-cycle. BIT BIT BIT BIT BIT PO3 PO2 PO1 PO0 - BIT BIT BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT PIEN3 PIEN2 PIEN1 PIEN0 - - W86L387D BIT BIT BIT BIT BIT BIT POEN POEN POEN Publication Release Date: May 13, 2005 Revision A1 BIT ...

Page 14

... Figure 7-1 shows the timing of 16-bit CPU read and write in type 1, figure 7-2 and 7- 3 show the timing of CPU 8-bit data bus read and write in type 1. A[3:1] D[15:0] XCSN XRDN XWRHN XWRLN Fig. 7-1 16-bit Read and Write Access in Host I/F Type DO[15: W86L387D - - - - - - DI[15:0] 8-bit 0 ...

Page 15

... A[3:1] A0(D15) D[7:0] XCSN XWRLN Register bit [15:8] will be write. Fig. 7-3 CPU 8-bit Data Bus Write Access in Host I/F Type 1. DO[7:0] Register bit [7:0] will be read. DI[15:8] DI[7:0] Register bit [7:0] will be write. Publication Release Date: May 13, 2005 - 13 - W86L387D Revision A1 ...

Page 16

... CPU read write in type 2 and the access cycle is 3-cycle access, figure 7-5 shows the timing of 16- bit CPU read write in type 2 and the access cycle is 2-cycle access. HCKI A[3:1] D[15:0] XCSN XASN XRDYN XRWN XBE[1:0] Fig. 7-4 16-bit Read and Write Access in Host I/F Type 2, 3-Cycle Access. DO[15:0] Write cycle Read cycle - 14 - W86L387D DI[15:0] ...

Page 17

... XDRQN will hold at active state until the data has been transferred completely. Figure 7-7 is the waveform of DMA access transmit data buffer in DAKN = high. DO[15:0] Write cycle Read cycle - 15 - W86L387D DI[15:0] Publication Release Date: May 13, 2005 Revision A1 ...

Page 18

... System clock 010 A[3:1] D[15:0] XCSN XRDN XDRQN XDAKN Fig. 7-6 DMA Access Receive Data Buffer (DAKEN = low). System clock A[3:1] 010 D[15:0] XCSN XWRHN XWRLN XDRQN XDAKN Fig. 7-7 DMA Access Transmit Data Buffer (DAKEN = high). 010 010 - 16 - W86L387D ...

Page 19

... Program PIO interrupt enable register if 11. necessary. Set up DAKEN and BSY_CNT on the 12. control register. 13. Enable DREQ and INT interrupt. 14. Wait for TPC command. W86L387D ACTION > Execute. card insert not sensed by W86L387D. > Power down. > Power up. > Reset internal logic circuit. > Execute. > Execute. > Execute. ...

Page 20

... Read interrupt status register if 10. status <> 0AH. Disable SIE bit of control 11. register if needed. 12. Wait for TPC command. W86L387D ACTION > Execute. > Execute. > Execute. Activate read 31 bytes of MS > register. Receive read data from card < and output data to the Host. ...

Page 21

... Read interrupt status register if 11. status <> 0AH. Disable SIE bit of control register 12. if needed. 13. Wait for TPC command. W86L387D ACTION > Execute. > Execute. Accept write data and store > in transmit data buffer. Activate write 15 bytes of > MS register. Output write data to the MS bus ...

Page 22

... Read interrupt status register if 9 status <> 0AH. Disable SIE bit of control 10. register if needed. 11. Wait for TPC command. W86L387D ACTION > Execute. > Execute. > Execute. Accept command code and > store in transmit data buffer. Activate 1 byte of set > command to the MS bus. < Reflect SIF interrupt. ...

Page 23

... Read interrupt status register if 10. status <> 0AH. Disable SIE bit of control 11. register if needed. 12. Wait for TPC command. W86L387D ACTION > Execute. > Execute. > Execute. Activate read 512 bytes of MS > page data. Receive read data from card < and output data to the Host. ...

Page 24

... Read interrupt status register if 11. status <> 0AH. Disable SIE bit of control 12. register if needed. 13. Wait for TPC command. W86L387D ACTION > Execute. > Execute. > Execute. Accept write data and store > in transmit data buffer. Activate write 512 bytes of > MS page data. ...

Page 25

... S MART@ W86L387D 118GA01ASA 1st line: Winbond logo and SMART@IO Mark 2nd line: Part number of W86L387D 3rd line: Tracking code 118 : packages made in '01, week assembly house ID; A means ASE, O means OSE, G means revision; A means version A, B means version B 01A : for internal use ...

Page 26

... H 0.350 0.354 0.358 8. 0.350 0.358 8.90 0.354 E L 0.030 0.018 0.024 0.45 L 0.039 1 Y 0.004 W86L387D Nom Max 0.10 0.15 1.40 1.45 0.20 0.25 0.15 0.20 7.00 7.10 7.00 7.10 0.50 0.65 9.00 9.10 9.00 9.10 0.60 0.75 1 ...

Page 27

... Reserved 8 SCLK 9 VCC 10 VSS 11 Case MemoryStick Card Scoket D To Intel StrongARM interface VCC33 C10 + + + + 0.1u 0.1u 0.1u 0.1u D inbond WINBOND ELECTRONICS CORP_ Document Number W86L387D Reference Schematic (for StrongARM) Saturday, May 05, 2001 Sheet Publication Release Date: May 13, 2005 Revision A1 Rev 1.1 ...

Page 28

... FAX: 1-408-5441798 Winbond Electronics Corporation Japan 7F Daini-ueno BLDG, 3-7-18 Shinyokohama Kohoku-ku, Yokohama, 222-0033 TEL: 81-45-4781881 FAX: 81-45-4781800 - 26 - W86L387D DESCRIPTION Winbond Electronics (Shanghai) Ltd. 27F, 2299 Yan An W. Rd. Shanghai, 200336 China TEL: 86-21-62365999 FAX: 86-21-62365998 Winbond Electronics (H.K.) Ltd. Unit 9-15, 22F, Millennium City, No ...

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