MC68EC040RC25 Freescale Semiconductor, MC68EC040RC25 Datasheet - Page 67

• Manufacturer Part Number: MC68EC040RC25
• Manufacturer: Freescale Semiconductor

Specifications of MC68EC040RC25

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 179
• Package Type: PGA
• Lead Free Status / Rohs Status: Supplier Unconfirmed

3.2.4.2 TABLE SHARING BETWEEN TASKS. More than one task can share a pointer- or
page-level table by placing a pointer to a shared table in the address translation tables.
The upper (nonshared) tables can contain different write-protected settings, allowing
different tasks to use the memory areas with different write permissions. In Figure 3-15,
two tasks share the memory translated by the table at the pointer table level. Task A
cannot write to the shared area; task B, however, has the W-bit clear in its pointer to the
shared table so that it can read and write the shared area. Also, the shared area appears
at different logical addresses for each task. Figure 3-15 illustrates shared tables in a
translation table structure.
3-18
TASK A
TASK B
ADDRESS OFFSET =
TABLE ENTRY # =
$76543210 =
Figure 3-14. Translation Table Using Indirect Descriptors
ROOT POINTER
ROOT POINTER
0 1 1 1 0 1 1 0 0 1 0 1 0 1 0 0 0 0 1 X X X X X X X X X X X X X
ROOT INDEX
Freescale Semiconductor, Inc.
$EC
$3B
For More Information On This Product,
$3B
M68040 USER'S MANUAL
Go to: www.freescale.com
ROOT-LEVEL
POINTER INDEX
TABLE $00
$00001800
TABLES
$15
$54
LOGICAL ADDRESS
PAGE INDEX
$15
$01
$04
POINTER-LEVEL
TABLE $3B
TABLE $00
$00003000
TABLE $7F
TABLES
PAGE OFFSET
$01
FRAME ADDRESS
PAGE-LEVEL
TABLE $15
TABLE $1F
TABLE $00
$80000010
TABLES
MOTOROLA