MC68EC040RC25 Freescale Semiconductor, MC68EC040RC25 Datasheet - Page 200

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MC68EC040RC25

Manufacturer Part Number
MC68EC040RC25
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68EC040RC25

Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
179
Package Type
PGA
Lead Free Status / Rohs Status
Supplier Unconfirmed

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7-58
NOTES:
R* V RV* V 040_BR
R
R* V RV* V
1. It is assumed that the asynchronous device takes the bus only after TIP or the MC68040's BB is negated.
RV
2. *Indicates the signal is asserted for that device.
LOCKE*
LOCK
AM_BG*,
AM_BG*,
040_BG
040_BG
LOCKE V R
R
Figure 7-39. M68040 Asynchronous DMA Arbitration
R
LOCK
RV
RV
LOCK*
040_BR
(b) MC68040 High-Priorty, Default Bus Master
(a) MC68040 Low-Priorty, Default Bus Master
LOCK
040_BR
LOCKE*
Freescale Semiconductor, Inc.
RV
For More Information On This Product,
R*
040_BG*,
040_BG*,
AM_BG*
AM_BG*
V AV* V RV*
AV V AV* V RV*
R
RV
M68040 USER’S MANUAL
RV
Go to: www.freescale.com
A*
V LOCK*
V R
040_BR
LOCKE
R*
A*
AV
R*
RV
RV
S2
S2
RV
A*
040_BR
040_BG*,
040_BG*,
040_BG*,
040_BG*,
AM_BG
AM_BG
AM_BG
AM_BG
A*
AV
AV
R
R
R*
R*
RV
RV
AV V A
S1
S1
V A
RV
RV
A*
A*
A*
AV
A*
AV
AV
AV
AV
040_BG*,
040_BG*,
AM_BG*
AM_BG*
S3
S3
S4
S4
R*
R*
040_BG*,
040_BG*,
040_BG*,
040_BG*,
AM_BG*
AM_BG*
AM_BG
AM_BG
RV
RV
R
040_BG*,
040_BG*,
R
AM_BG
AM_BG
S6
S6
R
R
R*
R*
RV
MOTOROLA
RV
RV* V RA* V
RV* V RA* V
V RV* V RA*
V RV* V RA*
RV
RV
RV
RV
040_BR
S5
S5
A
A
A
A
AV
AV
AV
AV

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