CY62127BVLL-70ZI Cypress Semiconductor Corp, CY62127BVLL-70ZI Datasheet - Page 4

• Manufacturer Part Number: CY62127BVLL-70ZI
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY62127BVLL-70ZI

• Density: 1Mb
• Access Time (max): 70ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 16b
• Package Type: TSOP-II
• Operating Temp Range: -40C to 85C
• Number Of Ports: 1
• Supply Current: 15mA
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Word Size: 16b
• Number Of Words: 64K
• Lead Free Status / Rohs Status: Not Compliant

Document #: 38-05155 Rev. *B
Data Retention Characteristics
Data Retention Waveform
Switching Characteristics
V
I
t
t
Read Cycle
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Write Cycle
t
t
Notes:
10. If both byte enables are toggled together this value is 10 ns.
11. t
12. The internal write time of the memory is defined by the overlap of WE, CE = V
Parameter
CCDR
CDR
R
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
DBE
LZBE
HZBE
WC
SCE
6.
7.
8.
9.
DR
[6]
BHE.BLE
Full Device AC operation requires linear V
BHE.BLE is the AND of both BHE and BLE. Chip can be deselected by either disabling the chip enable signals or by disabling both BHE and BLE.
Test conditions assume signal transition time of 5 ns or less, timing reference levels of V
specified I
At any given temperature and voltage condition, t
given device.
of these signals can terminate a write by going INACTIVE. The data input set-up and hold timing should be referenced to the edge of the signal that terminates
the write.
[5]
HZOE
[10]
CE or
V
, t
CC
Parameter
HZCE
OL
[12]
V
Data Retention Current
Chip Deselect to Data Retention Time
Operation Recovery Time
, t
/I
Parameters
CC
OH
HZBE
and 30-pF load capacitance.
for Data Retention
R
V
, and t
R1
R2
TH
TH
HZWE
Description
transitions are measured when the outputs enter a high impedance state.
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low Z
OE HIGH to High Z
CE LOW to Low Z
CE HIGH to High Z
CE LOW to Power-Up
CE HIGH to Power-Down
BHE / BLE LOW to Data Valid
BHE / BLE LOW to Low Z
BHE / BLE HIGH to High Z
Write Cycle Time
CE LOW to Write End
[7]
Over the Operating Range
CC
ramp from V
3.0 V
(Over the Operating Range)
t
HZCE
CDR
Description
is less than t
[9]
[9]
DR
[9, 11]
[9, 11]
to V
V
0.3V or V
CC
CC(min.)
LZCE
= V
[9]
[9, 11]
DATA RETENTION MODE
[8]
, t
DR
1.076
1.262
0.581
1.620
3.0V
HZBE
IN
> 100 s or stable at V
= 2.0V, CE > V
< 0.3V
IL
is less than t
, BHE and/or BLE = V
V
DR
Conditions
> 2.0 V
Min.
55
10
10
55
45
CC(typ.)
5
0
5
LZBE
CC
55 ns
/2, input pulse levels of 0 to V
, t
CC(min.)
– 0.3V, V
HZOE
IL
Max.
. All signals must be ACTIVE to initiate a write and any
is less than t
55
55
25
20
20
55
55
20
> 100 s.
IN
> V
CC
CY62127BV MoBL
LZOE
3.0 V
Min.
–
70
10
10
70
60
5
0
5
t
, and t
R
Min. Typ.
2.0
t
70 ns
CC(typ.)
RC
0
K Ohms
K Ohms
K Ohms
HZWE
Volts
Unit
, and output loading of the
Max.
is less than t
0.5
70
70
35
25
25
70
70
25
[4]
Page 4 of 11
Max. Unit
3.6
15
LZWE
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
for any
ns
ns
V
A
®
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