UDA1341TS NXP Semiconductors, UDA1341TS Datasheet - Page 8

• Manufacturer Part Number: UDA1341TS
• Manufacturer: NXP Semiconductors
• Type: General Purposer

Specifications of UDA1341TS

• Adc/dac Resolution: 20b
• Number Of Adc's: 4
• Number Of Dac's: 2
• Interface Type: Serial (I2S)/L3
• Power Supply Type: Analog/Digital
• Operating Supply Voltage (min): 2.4V
• Operating Supply Voltage (typ): 3V
• Operating Supply Voltage (max): 3.6V
• Sample Rate: 48KSPS
• Pin Count: 28
• Operating Temperature (min): -20C
• Operating Temperature (max): 85C
• Screening Level: Commercial
• Package Type: SSOP
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Compliant

NXP Semiconductors
7.9
The decimation from 128f
The first stage realizes 3rd order
decimating by 16. The second stage consists of
3 half-band filters, each decimating by a factor of 2.
Table 2 Decimation filter characteristics
7.10
This name is convenient but a little inaccurate. In practice
the output is used to indicate whenever that output data, in
either the left or right channel, is bigger than −1 dB (actual
figure is −1.16 dB) of the maximum possible digital swing.
If this condition is detected the OVERFL output is forced
HIGH for at least 512f
This time-out is reset for each infringement.
7.11
On recovery from power-down or switching on of the
system clock, the serial data output on pin DATAO is held
at LOW level until valid data is available from the
decimation filter. This time depends on whether the
DC-cancellation filter is selected:
• DC cancel off:
• DC cancel on:
2002 May 16
Passband ripple
Stop band
Dynamic range
Overall gain
Economy audio CODEC for MiniDisc (MD)
home stereo and portable applications
t
t
=
=
1024
------------ -
12288
--------------- -
Decimation filter (ADC)
Overload detection (ADC)
Mute (ADC)
ITEM
f
f
s
s
; t = 23.2 ms at f
; t = 279 ms at f
s
0 to 0.45f
>0.55f
0 to 0.45f
input channel 1;
0 dB input
cycles (11.6 ms at f
s
CONDITIONS
is performed in two stages.
s
s
s
= 44.1 kHz
= 44.1 kHz.
s
s
sin x
----------- -
x
characteristic,
s
= 44.1 kHz).
±0.05
−60
108
−1.16
VALUE
(dB)
8
7.12
The digital filter interpolates from 1f
a cascade of a recursive filter and a Finite Impulse
Response (FIR) filter.
Table 3 Interpolation filter characteristics
7.13
In the playback path a peak level detector is build in.
The position of the peak detection can be set via the
L3-interface to either before or after the sound features.
The peak level detector is implemented as a peak-hold
detector, which means that the highest sound level is hold
until the peak level is read out via the L3-interface. After
read-out the peak level registers are reset.
7.14
A hard mute can be activated via the static pin QMUTE.
When QMUTE is set HIGH, the output signal is instantly
muted to zero. Setting QMUTE to LOW, the mute is
instantly de-activated.
7.15
The 3rd-order noise shaper operates at 128f
in-band quantization noise to frequencies well above the
audio band. This noise shaping technique allows for high
signal-to-noise ratios. The noise shaper output is
converted into an analog signal using a filter stream
digital-to-analog converter.
Passband ripple
Stop band
Dynamic range
Interpolation filter (DAC)
Peak detector
Quick mute
Noise shaper (DAC)
ITEM
0 to 0.45f
>0.55f
0 to 0.45f
CONDITIONS
s
s
s
s
UDA1341TS
to 128f
Product specification
s
s
by means of
±0.03
−50
108
. It shifts
VALUE
(dB)