LH28F800BGN-BL12 Sharp Electronics, LH28F800BGN-BL12 Datasheet - Page 26

• Manufacturer Part Number: LH28F800BGN-BL12
• Manufacturer: Sharp Electronics

Specifications of LH28F800BGN-BL12

• Cell Type: NOR
• Density: 8Mb
• Interface Type: Parallel
• Boot Type: Bottom
• Address Bus: 19b
• Operating Supply Voltage (typ): 3.3/5V
• Operating Temp Range: 0C to 70C
• Package Type: SOP
• Program/erase Volt (typ): 2.7/3.3/5/12V
• Sync/async: Asynchronous
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 2.7/4.5V
• Operating Supply Voltage (max): 3.6/5.5V
• Word Size: 16b
• Number Of Words: 512K
• Supply Current: 65mA
• Mounting: Surface Mount
• Pin Count: 44
• Lead Free Status / Rohs Status: Not Compliant

6.2.3 DC CHARACTERISTICS (contd.)
NOTES :
1. All currents are in RMS unless otherwise noted. Typical
2. I
3. Includes RY/BY#.
4. Block erases and word writes are inhibited when V
SYMBOL
V
V
V
V
V
V
V
V
V
V
V
IL
IH
OL
OH1
OH2
PPLK
PPH1
PPH2
PPH3
LKO
HH
values at nominal V
currents are valid for all product versions (packages and
speeds).
selected. If reading or word writing in erase suspend
mode, the device’s current draw is the sum of I
I
V
(max.) and V
V
and above V
CCWS
CCES
PPLK
PPH2
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
(TTL)
Output High Voltage
(CMOS)
V
Normal Operations
V
or Block Erase Operations
V
or Block Erase Operations
V
or Block Erase Operations
V
RP# Unlock Voltage
, and not guaranteed in the range between V
and I
PP
PP
PP
PP
CC
(min.), between V
and I
Voltage during Word Write
Voltage during Word Write
Voltage during Word Write
Lockout Voltage during
Lockout Voltage
CCR
PPH3
CCES
PARAMETER
PPH1
or I
(max.).
CCW
are specified with the device de-
(min.), between V
CC
, respectively.
voltage and T
PPH2
(max.) and V
A
NOTE
PPH1
3, 7
3, 7
3, 7
4, 7
8, 9
= +25˚C. These
7
7
PPH3
(max.) and
V
CCWS
CC
MIN.
–0.5
–0.4
0.85
11.4
11.4
V
V
2.0
2.4
2.7
4.5
2.0
(min.),
CC
CC
= 2.7 to 3.6 V V
PPLK
PP
or
≤
- 26 -
MAX.
+0.5
12.6
12.6
V
0.8
0.4
1.5
3.6
5.5
CC
5. Automatic Power Saving (APS) reduces typical I
6. CMOS inputs are either V
7. Sampled, not 100% tested.
8. Boot block erases and word writes are inhibited when
9. RP# connection to a V
1 mA at 5 V V
static operation.
inputs are either V
the corresponding RP# = V
write operations are not guaranteed with V
V
maximum cumulative period of 80 hours.
HH
MIN.
–0.5
–0.4
CC
0.85
11.4
11.4
V
V
2.0
2.4
4.5
2.0
—
CC
CC
and should not be attempted.
= 5.0±0.5 V
MAX.
+0.5
0.45
12.6
12.6
V
0.8
1.5
5.5
—
CC
CC
IL
and 3 mA at 2.7 V and 3.3 V V
LH28F800BG-L (FOR SOP)
UNIT
or V
V
V
V
V
V
V
V
V
V
V
V
V
IH
CC
HH
.
V
I
I
V
I
I
V
I
V
I
Unlock boot blocks
OL
OL
OH
OH
OH
OH
CC
CC
CC
CC
±0.2 V or GND±0.2 V. TTL
IH
supply is allowed for a
= 2.0 mA (3.3 V, 2.7 V)
= 5.8 mA (5 V)
= –2.0 mA (3.3 V, 2.7 V)
= –2.5 mA (5 V)
= –2.5 mA
= –100 µA
. Block erase and word
= V
= V
= V
= V
CONDITIONS
CC
CC
CC
CC
TEST
Min.
Min.
Min.
Min.
IH
< RP# <
CCR
CC
to
in