TC58FVM5T2ATG65 Toshiba, TC58FVM5T2ATG65 Datasheet - Page 9

no-image

TC58FVM5T2ATG65

Manufacturer Part Number
TC58FVM5T2ATG65
Description
Manufacturer
Toshiba
Datasheet

Specifications of TC58FVM5T2ATG65

Cell Type
NOR
Density
32Mb
Access Time (max)
65ns
Interface Type
Parallel
Boot Type
Top
Address Bus
22/21Bit
Operating Supply Voltage (typ)
2.5/3/3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP-I
Program/erase Volt (typ)
8.5 to 9.5V
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.3V
Operating Supply Voltage (max)
3.6V
Word Size
8/16Bit
Number Of Words
4M/2M
Supply Current
55mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TC58FVM5T2ATG65
Manufacturer:
TOSHIBA
Quantity:
5 380
Part Number:
TC58FVM5T2ATG65
Manufacturer:
TOSHIBA
Quantity:
4 000
Part Number:
TC58FVM5T2ATG65
Manufacturer:
XILINX
0
Part Number:
TC58FVM5T2ATG65
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
Releases ID Read Mode or CFI Mode.
Clears the Command Register.
Releases the lock state if automatic operation has ended abnormally.
Stops any automatic operation which is in progress.
Stops any operation other than the above and returns the device to
Read Mode.
BYTE
Command Write
E
command is written by inputting a pulse to WE with CE = V
can also be written by inputting a pulse to CE with WE = V
falling edge of either WE or CE . The data is latched on the rising edge of either WE or CE . DQ0~DQ7 are
valid for data input and DQ8~DQ15 are ignored.
and enter Read Mode. If an undefined command is input, the Command Register will be reset and the device
will enter Read Mode.
Software Reset
Mode or CFI Mode to Read Mode, releases the lock state if automatic operation has ended abnormally, and
clears the Command Register.
Hardware Reset
the device abandons the operation which is in progress and enters Read Mode after t
hardware reset is applied during data overwriting, such as a Write or Erase operation, data at the address or
block being written to at the time of the reset will become undefined.
The DQ pins are High-Impedance when RESET = V
operations and input of any command are allowed.
Comparison between Software Reset and Hardware Reset
is input to BYTE , the device will operate in Word Mode. Read data or write commands using DQ0~DQ15.
When V
address. DQ8~DQ14 will become High-Impedance.
2
The TC58FVM5T2A/B2A/T3A/B3A uses the standard JEDEC control commands for a single-power supply
To abort input of the command sequence use the Reset command. The device will reset the Command Register
Apply a software reset by inputting a Read/Reset command. A software reset returns the device from ID Read
A hardware reset initializes the device and sets it to Read Mode. When a pulse is input to RESET for t
After a hardware reset the device enters Read Mode if RESET = V
PROM. A Command Write is executed by inputting the address and data into the Command Register. The
BYTE is used select Word Mode (16 bits) or Byte Mode (8 bits) for the TC58FVM5T2A/B2A/T3A/B3A. If V
/Word Mode
IL
is input to BYTE , read data or write commands using DQ0~DQ7. DQ15/A-1 is used as the lowest
ACTION
IL
. After the device has entered Read Mode, Read
IL
TC58FVM5(T/B)(2/3)A(FT/XB)65
SOFTWARE RESET
IL
( CE control). The address is latched on the
and OE = V
False
False
IH
True
True
True
or Standby Mode if RESET = V
IH
( WE control). The command
READY
HARDWARE RESET
2003-06-30 9/64
. Note that if a
True
True
True
True
True
IL
RP
.
,
IH

Related parts for TC58FVM5T2ATG65