M30624FGMFP Renesas Electronics America, M30624FGMFP Datasheet - Page 23

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M30624FGMFP

Manufacturer Part Number
M30624FGMFP
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of M30624FGMFP

Cpu Family
M16C
Device Core Size
16/32Bit
Frequency (max)
10MHz
Interface Type
UART
Program Memory Type
Flash
Program Memory Size
256KB
Total Internal Ram Size
20KB
# I/os (max)
87
Number Of Timers - General Purpose
11
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
2.7V
On-chip Adc
10-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-20C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

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Timing
22
Figure 1.26.6. V
Memory Expansion Mode and Microprocessor Mode
(When accessing external memory area with wait, and select multiplexed bus)
ALE
BCLK
CSi
ADi
/DBi
BHE
ALE
RD
BCLK
CSi
ADi
/DBi
WR,WRL,
WRH
Read timing
Write timing
BHE
ADi
ADi
60ns.max
60ns.max
CC
t
t
d(BCLK–ALE)
d(AD–ALE) (tcyc/2–45)ns.min
t
d(BCLK–ALE)
=3V timing diagram (5)
(tcyc/2–60)ns.min
t
t
t
d(BCLK–AD)
h(ALE–AD)
d(AD–ALE)
t
t
60ns.max
t
d(BCLK–CS)
d(BCLK–AD)
60ns.max
40ns.min
d(BCLK–CS)
60ns.max
60ns.max
Address
Address
t
h(BCLK–ALE)
Measuring conditions :
• V
• Input timing voltage : Determined with V
• Output timing voltage : Determined with V
–4ns.min
t
h(BCLK–ALE)
–4ns.min
CC
=3V
t
d(BCLK–WR)
t
t
d(BCLK–RD)
60ns.max
80ns.max
60ns.max
d(BCLK–DB)
t
t
t
d(AD–WR)
d(AD–RD)
0ns.min
dz(RD–AD)
0ns.min
tcyc
tcyc
8ns.max
(tcyc*3/2–80)ns.min
tac3(RD–DB)
t
d(DB–WR)
Data output
(tcyc/2)ns.min
(tcyc/2)ns.min
t
h(WR–CS)
t
h(RD–CS)
IL
t
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Data input
SU(DB–RD)
80ns.min
=0.48V,V
OL
=1.5V,V
t
(tcyc/2)ns.min
h(BCLK–WR)
(tcyc/2)ns.min
t
(tcyc/2)ns.min
h(WR–DB)
t
h(WR–AD)
t
0ns.min
t
IH
h(BCLK–RD)
h(RD–AD)
0ns.min
t
OH
h(RD–DB)
=1.5V
0ns.min
=1.5V
V
t
h(BCLK–AD)
t
(Low voltage version)
t
Mitsubishi microcomputers
CC
t
h(BCLK–AD)
t
h(BCLK–DB)
4ns.min
4ns.min
4ns.min
h(BCLK–CS)
h(BCLK–CS)
4ns.min
4ns.min
M16C / 62M Group
Address
Address
= 3V

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