CY7C187-35PC Cypress Semiconductor Corp, CY7C187-35PC Datasheet - Page 3

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CY7C187-35PC

Manufacturer Part Number
CY7C187-35PC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C187-35PC

Density
64Kb
Access Time (max)
35ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
5V
Address Bus
16b
Package Type
PDIP
Operating Temp Range
0C to 70C
Number Of Ports
2
Supply Current
70mA
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
22
Word Size
1b
Number Of Words
64K
Lead Free Status / Rohs Status
Not Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C187-35PC
Manufacturer:
CYPRESS
Quantity:
894
Part Number:
CY7C187-35PC
Manufacturer:
CY
Quantity:
1 000
Part Number:
CY7C187-35PC
Manufacturer:
CY
Quantity:
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Part Number:
CY7C187-35PC
Manufacturer:
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Quantity:
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Document #: 38-05044 Rev. *A
Switching Characteristics
Switching Waveforms
READ CYCLE
t
t
t
t
t
t
t
t
WRITE CYCLE
t
t
t
t
t
t
t
t
t
t
Read Cycle No. 1
Notes:
RC
AA
OHA
ACE
LZCE
HZCE
PU
PD
WC
SCE
AW
HA
SA
PWE
SD
HD
LZWE
HZWE
10. Device is continuously selected, CE = V
Parameter
5. Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
6. At any given temperature and voltage condition, t
7. t
8. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can
9. WE is HIGH for read cycle.
DATA OUT
ADDRESS
I
terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.
OL
HZCE
/I
OH
and t
and 30-pF load capacitance.
HZWE
[8]
Read Cycle Time
Address to Data Valid
Output Hold from Address Change
CE LOW to Data Valid
CE LOW to Low Z
CE HIGH to High Z
CE LOW to Power Up
CE HIGH to Power Down
Write Cycle Time
CE LOW to Write End
Address Set-Up to Write End
Address Hold from Write End
Address Set-Up to Write Start
WE Pulse Width
Data Set-Up to Write End
Data Hold from Write End
WE HIGH to Low Z
WE LOW to High Z
are specified with C
[9, 10]
PREVIOUS DATA VALID
Description
L
= 5 pF as in part (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage.
Over the Operating Range
[6]
IL
[6, 7]
[7]
.
t
OHA
HZCE
is less than t
t
AA
LZCE
Min.
15
15
12
12
12
10
3
3
0
0
0
0
5
for any given device.
[5]
-15
t
RC
Max.
15
15
15
8
7
Min.
25
20
20
20
15
10
5
5
0
0
0
0
5
-25
Max.
25
25
10
20
7
DATA VALID
Min.
35
25
25
25
20
15
5
5
0
0
0
0
5
-35
Max.
35
35
15
20
10
CY7C187
Page 3 of 9
C187–6
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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